Linux KVM for ARM Processors
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- [PATCH 10/18] KVM: ARM: vgic: abstract VMCR access
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH 11/18] KVM: ARM: vgic: introduce vgic_enable
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH 09/18] KVM: ARM: vgic: move underflow handling to vgic_ops
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH 08/18] KVM: ARM: vgic: abstract MISR decoding
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH 05/18] KVM: ARM: vgic: introduce vgic_ops and LR manipulation primitives
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH 07/18] KVM: ARM: vgic: abstract EISR bitmap access
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH 06/18] KVM: ARM: vgic: abstract access to the ELRSR bitmap
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH 04/18] KVM: arm/arm64: vgic: move GICv2 registers to their own structure
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH 01/18] arm64: initial support for GICv3
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH 03/18] arm64: boot protocol documentation update for GICv3
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH 02/18] arm64: GICv3 device tree binding documentation
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH 00/18] arm64: GICv3 support
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- Re: [Qemu-devel] [PATCH v2 12/35] target-arm: Convert performance monitor reginfo to accesfn
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v2 09/35] target-arm: A64: Implement MSR (immediate) instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v2 18/35] target-arm: Fix incorrect type for value argument to write_raw_cp_reg
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v2 12/35] target-arm: Convert performance monitor reginfo to accesfn
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v2 05/35] target-arm: Remove unused ARMCPUState sr substruct
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v2 09/35] target-arm: A64: Implement MSR (immediate) instructions
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [PATCH v6 0/6] Support arm-gic-kvm save/restore
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v6 0/6] Support arm-gic-kvm save/restore
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v6 0/6] Support arm-gic-kvm save/restore
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v6 0/6] Support arm-gic-kvm save/restore
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: kvm control qemu-system-aarch64 state
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v3 0/4] In-kernel PSCI v0.2 emulation for KVM ARM/ARM64
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH 11/17] kvm tools: irq: rename irq__register_device to irq__alloc_line
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 02/17] kvm tools: pci: remove BAR 3 hangover from virtio pci msix code
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 04/17] kvm tools: net: allow a mixture of pci and mmio virtio devices
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 00/17] kvm tools: pci: add PCI support for ARM targets
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 13/17] kvm tools: irq: move irq line allocation into device registration
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 16/17] kvm tools: powerpc: make use of common of_pci.h header definitions
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 01/17] kvm tools: pci: register virtio pba structure as mmio region with kvm
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 12/17] kvm tools: irq: make irq__alloc_line generic
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 06/17] kvm tools: pci: ensure BARs are naturally aligned
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 17/17] kvm tools: ARM: allow default virtio transport to be passed on cmdline
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 03/17] kvm tools: net: don't propagate error codes from tx/rx operations
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 08/17] kvm tools: irq: remove pin parameter from irq__register_device
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 10/17] kvm tools: irq: remove remaining parameters to irq__register_device
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 14/17] kvm tools: ARM: route guest PCI accesses to the emulation layer
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 15/17] kvm tools: ARM: generate an fdt node for our PCI emulation
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 09/17] kvm tools: irq: replace the x86 irq rbtree with the PCI device tree
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 07/17] kvm tools: pci: add MMIO interface to virtio-pci devices
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 09/17] kvm tools: irq: replace the x86 irq rbtree with the PCI device tree
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 17/17] kvm tools: ARM: allow default virtio transport to be passed on cmdline
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 10/17] kvm tools: irq: remove remaining parameters to irq__register_device
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 05/17] kvm tools: pci: register 24-bit configuration space below MMIO region
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 13/17] kvm tools: irq: move irq line allocation into device registration
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 15/17] kvm tools: ARM: generate an fdt node for our PCI emulation
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 07/17] kvm tools: pci: add MMIO interface to virtio-pci devices
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 12/17] kvm tools: irq: make irq__alloc_line generic
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 16/17] kvm tools: powerpc: make use of common of_pci.h header definitions
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 04/17] kvm tools: net: allow a mixture of pci and mmio virtio devices
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 14/17] kvm tools: ARM: route guest PCI accesses to the emulation layer
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 08/17] kvm tools: irq: remove pin parameter from irq__register_device
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 03/17] kvm tools: net: don't propagate error codes from tx/rx operations
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 01/17] kvm tools: pci: register virtio pba structure as mmio region with kvm
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 00/17] kvm tools: pci: add PCI support for ARM targets
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 06/17] kvm tools: pci: ensure BARs are naturally aligned
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 05/17] kvm tools: pci: register 24-bit configuration space below MMIO region
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 11/17] kvm tools: irq: rename irq__register_device to irq__alloc_line
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 02/17] kvm tools: pci: remove BAR 3 hangover from virtio pci msix code
- From: Will Deacon <will.deacon@xxxxxxx>
- Re: kvm control qemu-system-aarch64 state
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH 00/17] kvm-unit-tests/arm: initial drop
- From: Maria Soler <m.soler@xxxxxxxxxxxxxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v2 0/5] disas: add libvixl to support A64 disassembly
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v2 0/5] disas: add libvixl to support A64 disassembly
- From: Laurent Desnogues <laurent.desnogues@xxxxxxxxx>
- [PATCH v3 4/4] ARM/ARM64: KVM: Allow KVM_ARM_VCPU_PSCI_0_2 feature for user space
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- [PATCH v3 3/4] KVM: Documentation: Add info regarding KVM_ARM_VCPU_PSCI_0_2 feature
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- [PATCH v3 1/4] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- [PATCH v3 2/4] KVM: Add capability to advertise PSCI v0.2 support
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- [PATCH v3 0/4] In-kernel PSCI v0.2 emulation for KVM ARM/ARM64
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- Re: [PATCH] ARM64: KVM: Fix VGIC compile error for Linux-3.14-rc1
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- Re: [PATCH] ARM64: KVM: Fix VGIC compile error for Linux-3.14-rc1
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH] ARM64: KVM: Fix VGIC compile error for Linux-3.14-rc1
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- Re: [PATCH 00/17] kvm-unit-tests/arm: initial drop
- From: Andrew Jones <drjones@xxxxxxxxxx>
- Re: [PATCH 17/17] arm: vectors support
- From: Andrew Jones <drjones@xxxxxxxxxx>
- Re: [PATCH v2 00/13] A64: Add Neon instructions, third set
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v2 12/13] target-arm: A64: Add 2-reg-misc REV* instructions
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 02/13] target-arm: A64: Implement remaining non-pairwise int SIMD 3-reg-same insns
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 17/17] arm: vectors support
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 16/17] arm: add useful headers from the linux kernel
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 17/17] arm: vectors support
- From: Andrew Jones <drjones@xxxxxxxxxx>
- Re: [PATCH 16/17] arm: add useful headers from the linux kernel
- From: Andrew Jones <drjones@xxxxxxxxxx>
- Re: [PATCH 12/17] Introduce virtio-testdev
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 11/17] add support for device trees
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 08/17] Introduce libio to common code for io read/write
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 13/17] arm: initial drop
- From: Andrew Jones <drjones@xxxxxxxxxx>
- Re: [PATCH 12/17] Introduce virtio-testdev
- From: Andrew Jones <drjones@xxxxxxxxxx>
- Re: [PATCH 11/17] add support for device trees
- From: Andrew Jones <drjones@xxxxxxxxxx>
- Re: [PATCH 08/17] Introduce libio to common code for io read/write
- From: Andrew Jones <drjones@xxxxxxxxxx>
- Re: [PATCH 10/17] libfdt: get libfdt to build
- From: Andrew Jones <drjones@xxxxxxxxxx>
- Re: [PATCH v2 1/3] KVM: Add capability to advertise PSCI v0.2 support
- From: Mark Rutland <mark.rutland@xxxxxxx>
- Re: [PATCH 05/17] add 'make cscope' support
- From: Andrew Jones <drjones@xxxxxxxxxx>
- Re: [PATCH 00/17] kvm-unit-tests/arm: initial drop
- From: Andrew Jones <drjones@xxxxxxxxxx>
- Re: [PATCH v2 1/3] KVM: Add capability to advertise PSCI v0.2 support
- From: Anup Patel <anup@xxxxxxxxxxxxxx>
- Re: [PATCH v2 1/3] KVM: Add capability to advertise PSCI v0.2 support
- From: Mark Rutland <mark.rutland@xxxxxxx>
- Re: [PATCH v2 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Mark Rutland <mark.rutland@xxxxxxx>
- Re: [PATCH v2 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Anup Patel <anup@xxxxxxxxxxxxxx>
- Re: [PATCH v2 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Anup Patel <apatel@xxxxxxx>
- Re: [PATCH v2 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Mark Rutland <mark.rutland@xxxxxxx>
- Re: [PATCH] arm64: KVM: Add VGIC device control for arm64
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- Re: [PATCH v6 0/6] Support arm-gic-kvm save/restore
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v6 0/6] Support arm-gic-kvm save/restore
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v6 6/6] hw: arm_gic_kvm: Add KVM VGIC save/restore logic
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v6 5/6] arm_gic: Add GICC_APRn state to the GICState
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v6 4/6] vmstate: Add uint32 2D-array support
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v6 3/6] arm_gic: Support setting/getting binary point reg
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v6 2/6] hw: arm_gic: Keep track of SGI sources
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v6 1/6] arm_gic: Fix GIC pending behavior
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v6 0/6] Support arm-gic-kvm save/restore
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v5 3/8] arm_gic: Fix GIC pending behavior
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v5 4/8] hw: arm_gic: Keep track of SGI sources
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v4 0/4] Create ARM KVM VGIC with device control API
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH] arm64: KVM: Add VGIC device control for arm64
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v3] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v3] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v2 1/3] KVM: Add capability to advertise PSCI v0.2 support
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2 3/3] KVM: Documentation: Add info regarding KVM_ARM_VCPU_PSCI_0_2 feature
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 17/17] arm: vectors support
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 16/17] arm: add useful headers from the linux kernel
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 15/17] printf: support field padding
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 13/17] arm: initial drop
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 12/17] Introduce virtio-testdev
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 11/17] add support for device trees
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 10/17] libfdt: get libfdt to build
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 09/17] libfdt: Import libfdt source
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 08/17] Introduce libio to common code for io read/write
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 07/17] move x86's simple heap management to common code
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 06/17] Add halt() and some error codes
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 05/17] add 'make cscope' support
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 00/17] kvm-unit-tests/arm: initial drop
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v2 12/13] target-arm: A64: Add 2-reg-misc REV* instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 04/13] tcg: Add TCGV_UNUSED_PTR, TCGV_IS_UNUSED_PTR, TCGV_EQUAL_PTR
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 08/13] target-arm: A64: Add skeleton decode for SIMD 2-reg misc group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 09/13] target-arm: A64: Implement 2-register misc compares, ABS, NEG
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 07/13] target-arm: A64: Add SIMD simple 64 bit insns from scalar 2-reg misc
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 01/13] target-arm: A64: Implement SIMD 3-reg-same shift and saturate insns
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 05/13] target-arm: A64: Implement scalar pairwise ops
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 03/13] target-arm: A64: Implement pairwise integer ops from 3-reg-same SIMD
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 11/13] target-arm: A64: Add narrowing 2-reg-misc instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 13/13] target-arm: A64: Add FNEG and FABS to the SIMD 2-reg-misc group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 02/13] target-arm: A64: Implement remaining non-pairwise int SIMD 3-reg-same insns
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 06/13] target-arm: A64: Implement remaining integer scalar-3-same insns
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 10/13] target-arm: A64: Implement 2-reg-misc CNT, NOT and RBIT
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 00/13] A64: Add Neon instructions, third set
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v2 01/35] target-arm: Fix raw read and write functions on AArch64 registers
- From: Rob Herring <rob.herring@xxxxxxxxxx>
- Re: [PATCH v5 4/8] hw: arm_gic: Keep track of SGI sources
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v5 3/8] arm_gic: Fix GIC pending behavior
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v2 01/35] target-arm: Fix raw read and write functions on AArch64 registers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v2 01/35] target-arm: Fix raw read and write functions on AArch64 registers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 25/35] target-arm: Implement AArch64 dummy MDSCR_EL1
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 32/35] target-arm: Implement AArch64 generic timers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 31/35] target-arm: Implement AArch64 MPIDR
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 08/35] target-arm: A64: Implement store-exclusive for system mode
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 12/35] target-arm: Convert performance monitor reginfo to accesfn
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 18/35] target-arm: Fix incorrect type for value argument to write_raw_cp_reg
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 13/35] target-arm: Convert generic timer reginfo to accessfn
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 17/35] target-arm: Remove failure status return from read/write_raw_cp_reg
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 19/35] target-arm: A64: Make cache ID registers visible to AArch64
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 04/35] target-arm: Restrict check_ap() use of S and R bits to v6 and earlier
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 27/35] target-arm: Implement AArch64 SCTLR_EL1
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 33/35] target-arm: Implement AArch64 ID and feature registers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 06/35] target-arm: Log bad system register accesses with LOG_UNIMP
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 20/35] target-arm: Implement AArch64 CurrentEL sysreg
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 01/35] target-arm: Fix raw read and write functions on AArch64 registers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 34/35] target-arm: Implement AArch64 dummy breakpoint and watchpoint registers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 16/35] target-arm: Remove unnecessary code now read/write fns can't fail
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 30/35] target-arm: Implement AArch64 TTBR*
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 09/35] target-arm: A64: Implement MSR (immediate) instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 00/35] AArch64 system mode: system register rework
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 26/35] target-arm: Implement AArch64 memory attribute registers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 03/35] target-arm: Define names for SCTLR bits
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 28/35] target-arm: Implement AArch64 TCR_EL1
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 29/35] target-arm: Implement AArch64 VBAR_EL1
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 05/35] target-arm: Remove unused ARMCPUState sr substruct
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 02/35] target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 07/35] target-arm: Add exception level to the AArch64 TB flags
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 11/35] target-arm: Split cpreg access checks out from read/write functions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 15/35] target-arm: Drop success/fail return from cpreg read and write functions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 14/35] target-arm: Convert miscellaneous reginfo structs to accessfn
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 10/35] target-arm: Stop underdecoding ARM946 PRBS registers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 22/35] target-arm: Implement AArch64 DAIF system register
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 23/35] target-arm: Implement AArch64 cache invalidate/clean ops
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 24/35] target-arm: Implement AArch64 TLB invalidate ops
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 21/35] target-arm: Implement AArch64 MIDR_EL1
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 35/35] target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v4 0/4] Create ARM KVM VGIC with device control API
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v3] virtio: Introduce virtio-testdev
- From: Mike Day <ncmike@xxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v3] virtio: Introduce virtio-testdev
- From: Andrew Jones <drjones@xxxxxxxxxx>
- Re: [PATCH v2] ARM: mm: Fix stage-2 device memory attributes
- From: Catalin Marinas <catalin.marinas@xxxxxxx>
- [PATCH v2 3/3] KVM: Documentation: Add info regarding KVM_ARM_VCPU_PSCI_0_2 feature
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- [PATCH v2 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- [PATCH v2 1/3] KVM: Add capability to advertise PSCI v0.2 support
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- [PATCH v2 0/3] In-kernel PSCI v0.2 emulation for KVM ARM/ARM64
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- Re: [RFC PATCH 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Anup Patel <anup@xxxxxxxxxxxxxx>
- Re: [RFC PATCH 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Anup Patel <anup@xxxxxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v2 0/5] disas: add libvixl to support A64 disassembly
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v2 0/5] disas: add libvixl to support A64 disassembly
- From: Laurent Desnogues <laurent.desnogues@xxxxxxxxx>
- Re: [PATCH v2 09/10] ARM: KVM: trap VM system registers until MMU and caches are ON
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2 10/10] ARM: KVM: add world-switch for AMAIR{0,1}
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2 08/10] ARM: KVM: introduce per-vcpu HYP Configuration Register
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2 07/10] ARM: KVM: fix ordering of 64bit coprocessor accesses
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2 06/10] ARM: KVM: fix handling of trapped 64bit coprocessor accesses
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2 05/10] ARM: KVM: force cache clean on page fault when caches are off
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2 04/10] arm64: KVM: flush VM pages before letting the guest enable caches
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2 03/10] arm64: KVM: trap VM system registers until MMU and caches are ON
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2 02/10] arm64: KVM: allows discrimination of AArch32 sysreg access
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2 01/10] arm64: KVM: force cache clean on page fault when caches are off
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v2 0/5] disas: add libvixl to support A64 disassembly
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [RFC PATCH 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v4 0/4] Create ARM KVM VGIC with device control API
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2] ARM: mm: Fix stage-2 device memory attributes
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 00/17] kvm-unit-tests/arm: initial drop
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH v3] virtio: Introduce virtio-testdev
- From: Andrew Jones <drjones@xxxxxxxxxx>
- Re: [PATCH v3] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Alexander Graf <agraf@xxxxxxx>
- Re: [PATCH v5 0/8] Support arm-gic-kvm save/restore
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v4 0/4] Create ARM KVM VGIC with device control API
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v5 2/8] arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writes
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v5 1/8] arm_gic: Introduce define for GIC_NR_SGIS
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v2] ARM: mm: Fix stage-2 device memory attributes
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- Re: [RFC PATCH 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Anup Patel <anup@xxxxxxxxxxxxxx>
- Re: [RFC PATCH 3/3] KVM: Documentation: Add info regarding KVM_ARM_VCPU_PSCI_0_2 feature
- From: Anup Patel <anup@xxxxxxxxxxxxxx>
- Re: [PATCH v2] ARM: mm: Fix stage-2 device memory attributes
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v2] ARM: mm: Fix stage-2 device memory attributes
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [RFC PATCH 3/3] KVM: Documentation: Add info regarding KVM_ARM_VCPU_PSCI_0_2 feature
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [RFC PATCH 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 14/21] target-arm: A64: Implement remaining integer scalar-3-same insns
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 21/21] target-arm: A64: Add FNEG and FABS to the SIMD 2-reg-misc group
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 20/21] target-arm: A64: Add 2-reg-misc REV* instructions
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 19/21] target-arm: A64: Add narrowing 2-reg-misc instructions
- From: Richard Henderson <rth@xxxxxxxxxxx>
- [PATCH v5 4/8] hw: arm_gic: Keep track of SGI sources
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v5 2/8] arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writes
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v5 1/8] arm_gic: Introduce define for GIC_NR_SGIS
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v5 7/8] arm_gic: Add GICC_APRn state to the GICState
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v5 8/8] hw: arm_gic_kvm: Add KVM VGIC save/restore logic
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v5 6/8] vmstate: Add uint32 2D-array support
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v5 5/8] arm_gic: Support setting/getting binary point reg
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v5 3/8] arm_gic: Fix GIC pending behavior
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v5 0/8] Support arm-gic-kvm save/restore
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v4 4/4] arm: vgic device control api support
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v4 2/4] kvm: Introduce kvm_arch_irqchip_create
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v4 3/4] kvm: Common device control API functions
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v4 1/4] linux-headers: Update from Linus' master ba635f8
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v4 0/4] Create ARM KVM VGIC with device control API
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 02/21] target-arm: A64: Add SIMD three-different ABDL instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH 11/21] target-arm: A64: Implement pairwise integer ops from 3-reg-same SIMD
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 07/24] target-arm: A64: Make cache ID registers visible to AArch64
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH 00/17] kvm-unit-tests/arm: initial drop
- From: María Soler Heredia <maria.solher@xxxxxxxxx>
- Re: [Qemu-devel] [PATCH 07/24] target-arm: A64: Make cache ID registers visible to AArch64
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH 18/21] target-arm: A64: Implement 2-reg-misc CNT, NOT and RBIT
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 17/21] target-arm: A64: Implement 2-register misc compares, ABS, NEG
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 16/21] target-arm: A64: Add skeleton decode for SIMD 2-reg misc group
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 15/21] target-arm: A64: Add SIMD simple 64 bit insns from scalar 2-reg misc
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 13/21] target-arm: A64: Implement scalar pairwise ops
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 12/21] tcg: Add TCGV_UNUSED_PTR, TCGV_IS_UNUSED_PTR, TCGV_EQUAL_PTR
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 11/21] target-arm: A64: Implement pairwise integer ops from 3-reg-same SIMD
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 10/21] target-arm: A64: Implement remaining non-pairwise int SIMD 3-reg-same insns
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH 10/21] target-arm: A64: Implement remaining non-pairwise int SIMD 3-reg-same insns
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 09/21] target-arm: A64: Implement SIMD 3-reg-same shift and saturate insns
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v3] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [Qemu-devel] KVM and variable-endianness guest CPUs
- From: Avi Kivity <avi@xxxxxxxxxxxxxxxxxxxx>
- Re: [Qemu-devel] [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Avi Kivity <avi@xxxxxxxxxxxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 07/24] target-arm: A64: Make cache ID registers visible to AArch64
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [PATCH v2 00/10] arm/arm64: KVM: host cache maintainance when guest caches are off
- From: Pranavkumar Sawargaonkar <pranavkumar@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v2 0/5] disas: add libvixl to support A64 disassembly
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [RFC PATCH 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Anup Patel <anup@xxxxxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 19/24] target-arm: Implement AArch64 TTBR*
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [RFC PATCH 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- Re: [RFC PATCH v4 3/8] arm_gic: Fix GIC pending behavior
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 19/24] target-arm: Implement AArch64 TTBR*
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 11/24] target-arm: Implement AArch64 DAIF system register
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 07/24] target-arm: A64: Make cache ID registers visible to AArch64
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 05/24] target-arm: Add exception level to the AArch64 TB flags
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
- Re: [RFC PATCH 0/3] In-kernel PSCI v0.2 emulation for KVM ARM/ARM64
- From: Anup Patel <anup@xxxxxxxxxxxxxx>
- Re: KVM/ARM Sync-up call agenda - Tuesday Jan 28, 2014
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [RFC PATCH v4 3/8] arm_gic: Fix GIC pending behavior
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 19/24] target-arm: Implement AArch64 TTBR*
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Scott Wood <scottwood@xxxxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 11/24] target-arm: Implement AArch64 DAIF system register
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 10/24] target-arm: Implement AArch64 MIDR_EL1
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 07/24] target-arm: A64: Make cache ID registers visible to AArch64
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 05/24] target-arm: Add exception level to the AArch64 TB flags
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
- Re: [PATCH v2] ARM: mm: Fix stage-2 device memory attributes
- From: Catalin Marinas <catalin.marinas@xxxxxxx>
- Re: [PATCH v2] ARM: mm: Fix stage-2 device memory attributes
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- Re: [PATCH v2] ARM: mm: Fix stage-2 device memory attributes
- From: Catalin Marinas <catalin.marinas@xxxxxxx>
- Re: [PATCH v2] ARM: mm: Fix stage-2 device memory attributes
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Alexander Graf <agraf@xxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Alexander Graf <agraf@xxxxxxx>
- Re: [PATCH 00/21] A64: Add Neon instructions, second and third sets
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 00/21] A64: Add Neon instructions, second and third sets
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 13/21] target-arm: A64: Implement scalar pairwise ops
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 08/21] target-arm: A64: Add SIMD shift by immediate
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 03/21] target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 07/21] target-arm: A64: Add simple SIMD 3-same floating point ops
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 04/21] target-arm: A64: Add top level decode for SIMD 3-same group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 01/21] target-arm: A64: Add SIMD three-different multiply accumulate insns
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 05/21] target-arm: A64: Add logic ops from SIMD 3 same group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 12/21] tcg: Add TCGV_UNUSED_PTR, TCGV_IS_UNUSED_PTR, TCGV_EQUAL_PTR
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 06/21] target-arm: A64: Add integer ops from SIMD 3-same group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 11/21] target-arm: A64: Implement pairwise integer ops from 3-reg-same SIMD
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 21/21] target-arm: A64: Add FNEG and FABS to the SIMD 2-reg-misc group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 09/21] target-arm: A64: Implement SIMD 3-reg-same shift and saturate insns
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 02/21] target-arm: A64: Add SIMD three-different ABDL instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 14/21] target-arm: A64: Implement remaining integer scalar-3-same insns
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 20/21] target-arm: A64: Add 2-reg-misc REV* instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 17/21] target-arm: A64: Implement 2-register misc compares, ABS, NEG
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 18/21] target-arm: A64: Implement 2-reg-misc CNT, NOT and RBIT
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 10/21] target-arm: A64: Implement remaining non-pairwise int SIMD 3-reg-same insns
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 19/21] target-arm: A64: Add narrowing 2-reg-misc instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 15/21] target-arm: A64: Add SIMD simple 64 bit insns from scalar 2-reg misc
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 16/21] target-arm: A64: Add skeleton decode for SIMD 2-reg misc group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [PATCH v2 6/8] target-arm: A64: Add integer ops from SIMD 3-same group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Alexander Graf <agraf@xxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Alexander Graf <agraf@xxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Alexander Graf <agraf@xxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Alexander Graf <agraf@xxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Alexander Graf <agraf@xxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Scott Wood <scottwood@xxxxxxxxxxxxx>
- KVM/ARM Sync-up call agenda - Tuesday Jan 28, 2014
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Scott Wood <scottwood@xxxxxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 20/24] target-arm: Implement AArch64 MPIDR
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 18/24] target-arm: Implement AArch64 VBAR_EL1
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 19/24] target-arm: Implement AArch64 TTBR*
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Scott Wood <scottwood@xxxxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 19/24] target-arm: Implement AArch64 TTBR*
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- [PATCH v2] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2] ARM: mm: Fix stage-2 device memory attributes
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 04/24] target-arm: Log bad system register accesses with LOG_UNIMP
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 03/24] target-arm: Restrict check_ap() use of S and R bits to v6 and earlier
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [RFC PATCH] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [RFC PATCH] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [RFC PATCH] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [RFC PATCH] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Paolo Bonzini <pbonzini@xxxxxxxxxx>
- Re: [RFC PATCH] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [RFC PATCH] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Alexander Graf <agraf@xxxxxxx>
- Re: [RFC PATCH] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Paolo Bonzini <pbonzini@xxxxxxxxxx>
- Problem about performance monitor cycle counter, pmccntr_el0
- From: 黃昱儒 <gic4107@xxxxxxxxx>
- Re: Regarding KVM-ARM-IO
- From: Isa Ansharullah <isa@xxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [RFC PATCH] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [RFC PATCH] KVM: Specify byte order for KVM_EXIT_MMIO
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Regarding KVM-ARM-IO
- From: 현우박 <jisjang1@xxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Greg Kurz <gkurz@xxxxxxxxxxxxxxxxxx>
- Golden Guide Update: KVM on ARM Chromebook
- From: Daniel Raho <s.raho@xxxxxxxxxxxxxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 6/8] target-arm: A64: Add integer ops from SIMD 3-same group
- From: Xbing Wang <xbing6list@xxxxxxxxx>
- Re: [Qemu-devel] [PATCH 6/8] target-arm: A64: Add integer ops from SIMD 3-same group
- From: Xbing Wang <xbing6list@xxxxxxxxx>
- Re: [PATCH v2 7/8] target-arm: A64: Add simple SIMD 3-same floating point ops
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v2 7/8] target-arm: A64: Add simple SIMD 3-same floating point ops
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 6/8] target-arm: A64: Add integer ops from SIMD 3-same group
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 1/8] target-arm: A64: Add SIMD three-different multiply accumulate insns
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- [PATCH v2 6/8] target-arm: A64: Add integer ops from SIMD 3-same group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 3/8] target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 0/8] target-arm: A64 Neon instructions, set 2
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 8/8] target-arm: A64: Add SIMD shift by immediate
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 2/8] target-arm: A64: Add SIMD three-different ABDL instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 7/8] target-arm: A64: Add simple SIMD 3-same floating point ops
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 1/8] target-arm: A64: Add SIMD three-different multiply accumulate insns
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 4/8] target-arm: A64: Add top level decode for SIMD 3-same group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 5/8] target-arm: A64: Add logic ops from SIMD 3 same group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 01/24] target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Alexander Graf <agraf@xxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- [PATCH v2 07/10] ARM: KVM: fix ordering of 64bit coprocessor accesses
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH v2 08/10] ARM: KVM: introduce per-vcpu HYP Configuration Register
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH v2 09/10] ARM: KVM: trap VM system registers until MMU and caches are ON
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH v2 05/10] ARM: KVM: force cache clean on page fault when caches are off
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH v2 06/10] ARM: KVM: fix handling of trapped 64bit coprocessor accesses
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH v2 10/10] ARM: KVM: add world-switch for AMAIR{0,1}
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH v2 03/10] arm64: KVM: trap VM system registers until MMU and caches are ON
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH v2 01/10] arm64: KVM: force cache clean on page fault when caches are off
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH v2 00/10] arm/arm64: KVM: host cache maintainance when guest caches are off
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH v2 02/10] arm64: KVM: allows discrimination of AArch32 sysreg access
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH v2 04/10] arm64: KVM: flush VM pages before letting the guest enable caches
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Alexander Graf <agraf@xxxxxxx>
- Re: [Qemu-devel] [PATCH 08/24] target-arm: A64: Implement MSR (immediate) instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH 06/24] target-arm: A64: Implement store-exclusive for system mode
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH REPOST 1/5] ARM: kvm: replace push and pop with stdmb and ldmia instrs to enable assembler.h inclusion
- From: Will Deacon <will.deacon@xxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Anup Patel <anup@xxxxxxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [Qemu-ppc] KVM and variable-endianness guest CPUs
- From: Alexander Graf <agraf@xxxxxxx>
- Re: [PATCH REPOST 1/5] ARM: kvm: replace push and pop with stdmb and ldmia instrs to enable assembler.h inclusion
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Anup Patel <anup@xxxxxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 6/8] target-arm: A64: Add integer ops from SIMD 3-same group
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 08/24] target-arm: A64: Implement MSR (immediate) instructions
- From: Hu Tao <hutao@xxxxxxxxxxxxxx>
- Re: [PATCH 06/24] target-arm: A64: Implement store-exclusive for system mode
- From: Hu Tao <hutao@xxxxxxxxxxxxxx>
- Re: [PATCH 8/8] target-arm: A64: Add SIMD shift by immediate
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 0/8] target-arm: A64 Neon instructions, set 2
- From: Richard Henderson <rth@xxxxxxxxxxx>
- [PATCH 19/24] target-arm: Implement AArch64 TTBR*
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 13/24] target-arm: Implement AArch64 TLB invalidate ops
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 04/24] target-arm: Log bad system register accesses with LOG_UNIMP
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 01/24] target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 08/24] target-arm: A64: Implement MSR (immediate) instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 07/24] target-arm: A64: Make cache ID registers visible to AArch64
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 03/24] target-arm: Restrict check_ap() use of S and R bits to v6 and earlier
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 06/24] target-arm: A64: Implement store-exclusive for system mode
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 20/24] target-arm: Implement AArch64 MPIDR
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 21/24] target-arm: Implement AArch64 generic timers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 23/24] target-arm: Implement AArch64 dummy breakpoint and watchpoint registers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 12/24] target-arm: Implement AArch64 cache invalidate/clean ops
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 09/24] target-arm: Implement AArch64 CurrentEL sysreg
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 02/24] target-arm: Define names for SCTLR bits
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 05/24] target-arm: Add exception level to the AArch64 TB flags
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 22/24] target-arm: Implement AArch64 ID and feature registers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 16/24] target-arm: Implement AArch64 SCTLR_EL1
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 00/24] target-arm: implement some AArch64 system registers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 15/24] target-arm: Implement AArch64 memory attribute registers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 17/24] target-arm: Implement AArch64 TCR_EL1
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 10/24] target-arm: Implement AArch64 MIDR_EL1
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 11/24] target-arm: Implement AArch64 DAIF system register
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 24/24] target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 18/24] target-arm: Implement AArch64 VBAR_EL1
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 14/24] target-arm: Implement AArch64 dummy MDSCR_EL1
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH 6/8] target-arm: A64: Add integer ops from SIMD 3-same group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH 6/8] target-arm: A64: Add integer ops from SIMD 3-same group
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 6/8] target-arm: A64: Add integer ops from SIMD 3-same group
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 5/8] target-arm: A64: Add logic ops from SIMD 3 same group
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH 3/8] target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops
- From: Richard Henderson <rth@xxxxxxxxxxx>
- [PATCH 13/17] arm: initial drop
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 14/17] arm: Add IO accessors to avoid register-writeback
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 10/17] libfdt: get libfdt to build
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 16/17] arm: add useful headers from the linux kernel
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 17/17] arm: vectors support
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 15/17] printf: support field padding
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 11/17] add support for device trees
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 08/17] Introduce libio to common code for io read/write
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 01/17] remove unused files
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 06/17] Add halt() and some error codes
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 07/17] move x86's simple heap management to common code
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 03/17] clean root dir of all x86-ness
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 12/17] Introduce virtio-testdev
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 05/17] add 'make cscope' support
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 09/17] libfdt: Import libfdt source
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 02/17] makefile and run_tests tweaks
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 00/17] kvm-unit-tests/arm: initial drop
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH 04/17] gitignore: Ignore more
- From: Andrew Jones <drjones@xxxxxxxxxx>
- Re: [RFC PATCH 2/3] arm64: KVM: trap VM system registers until MMU and caches are ON
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [RFC PATCH 3/3] KVM: Documentation: Add info regarding KVM_ARM_VCPU_PSCI_0_2 feature
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- [RFC PATCH 2/3] ARM/ARM64: KVM: Add support for PSCI v0.2 emulation
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- [RFC PATCH 1/3] KVM: Add capability to advertise PSCI v0.2 support
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- [RFC PATCH 0/3] In-kernel PSCI v0.2 emulation for KVM ARM/ARM64
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- Re: [RFC PATCH 2/3] arm64: KVM: trap VM system registers until MMU and caches are ON
- From: Pranavkumar Sawargaonkar <pranavkumar@xxxxxxxxxx>
- Re: [PATCH REPOST 1/5] ARM: kvm: replace push and pop with stdmb and ldmia instrs to enable assembler.h inclusion
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- Re: [PATCH REPOST 5/5] ARM: kvm MMIO support BE host running LE code
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [PATCH REPOST 5/5] ARM: kvm MMIO support BE host running LE code
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH REPOST 5/5] ARM: kvm MMIO support BE host running LE code
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH REPOST 5/5] ARM: kvm MMIO support BE host running LE code
- From: Anup Patel <anup@xxxxxxxxxxxxxx>
- Re: [PATCH REPOST 5/5] ARM: kvm MMIO support BE host running LE code
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [PATCH REPOST 5/5] ARM: kvm MMIO support BE host running LE code
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH REPOST 4/5] ARM: kvm vgic mmio should return data in BE format in BE case
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH REPOST 2/5] ARM: fix KVM assembler files to work in BE case
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH REPOST 3/5] ARM: kvm one_reg coproc set and get BE fixes
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH REPOST 1/5] ARM: kvm: replace push and pop with stdmb and ldmia instrs to enable assembler.h inclusion
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [RFC PATCH 2/3] arm64: KVM: trap VM system registers until MMU and caches are ON
- From: Anup Patel <anup@xxxxxxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Alexander Graf <agraf@xxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Alexander Graf <agraf@xxxxxxx>
- Re: [RFC PATCH 2/3] arm64: KVM: trap VM system registers until MMU and caches are ON
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- Re: [RFC PATCH 2/3] arm64: KVM: trap VM system registers until MMU and caches are ON
- From: Anup Patel <anup@xxxxxxxxxxxxxx>
- Re: [RFC PATCH v4 4/8] hw: arm_gic: Keep track of SGI sources
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [RFC PATCH v4 7/8] arm_gic: Add GICC_APRn state to the GICState
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [RFC PATCH v4 3/8] arm_gic: Fix GIC pending behavior
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Alexander Graf <agraf@xxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH 2/8] target-arm: A64: Add SIMD three-different ABDL instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 8/8] target-arm: A64: Add SIMD shift by immediate
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 7/8] target-arm: A64: Add simple SIMD 3-same floating point ops
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 0/8] target-arm: A64 Neon instructions, set 2
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 4/8] target-arm: A64: Add top level decode for SIMD 3-same group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: KVM and variable-endianness guest CPUs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 6/8] target-arm: A64: Add integer ops from SIMD 3-same group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 3/8] target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 1/8] target-arm: A64: Add SIMD three-different multiply accumulate insns
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 5/8] target-arm: A64: Add logic ops from SIMD 3 same group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- KVM and variable-endianness guest CPUs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [RFC PATCH 3/3] arm64: KVM: flush VM pages before letting the guest enable caches
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [RFC PATCH 1/3] arm64: KVM: force cache clean on page fault when caches are off
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [RFC PATCH 2/3] arm64: KVM: trap VM system registers until MMU and caches are ON
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [RFC PATCH 0/3] arm64: KVM: host cache maintainance when guest caches are off
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- [PATCH v2 0/5] disas: add libvixl to support A64 disassembly
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 2/5] rules.mak: Link with C++ if we have a C++ compiler
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 5/5] disas: Implement disassembly output for A64
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 3/5] disas: Add subset of libvixl sources for A64 disassembler
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 4/5] disas/libvixl: Fix upstream libvixl compilation issues
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 1/5] rules.mak: Support .cc as a C++ source file suffix
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 10/10] target-arm: A64: Add SIMD scalar copy instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 10/10] target-arm: A64: Add SIMD scalar copy instructions
- From: Claudio Fontana <claudio.fontana@xxxxxxxxxx>
- Re: [GIT PULL] KVM/ARM Updates for 3.14
- From: Paolo Bonzini <pbonzini@xxxxxxxxxx>
- Re: KVM/ARM Call Minutes - Jan 14th, 2014
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: KVM/ARM Call Minutes - Jan 14th, 2014
- From: Anup Patel <anup.patel@xxxxxxxxxx>
- KVM/ARM Call Minutes - Jan 14th, 2014
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: KVM/ARM Call Agenda - Tue., Jan 14th, 2014
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v2 04/10] target-arm: A64: Add SIMD EXT
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 03/10] target-arm: A64: Add decode skeleton for SIMD data processing insns
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 02/10] target-arm: A64: Add SIMD ld/st single
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 01/10] target-arm: A64: Add SIMD ld/st multiple
- From: Richard Henderson <rth@xxxxxxxxxxx>
- [PATCH v2 10/10] target-arm: A64: Add SIMD scalar copy instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 08/10] target-arm: A64: Add SIMD copy operations
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 02/10] target-arm: A64: Add SIMD ld/st single
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 01/10] target-arm: A64: Add SIMD ld/st multiple
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 03/10] target-arm: A64: Add decode skeleton for SIMD data processing insns
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 04/10] target-arm: A64: Add SIMD EXT
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 07/10] target-arm: A64: Add SIMD across-lanes instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 00/10] A64 SIMD patchset one: ld/st, C3.6.1..C3.6.7
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 06/10] target-arm: A64: Add SIMD ZIP/UZP/TRN
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 09/10] target-arm: A64: Add SIMD modified immediate group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 05/10] target-arm: A64: Add SIMD TBL/TBLX
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: KVM/ARM Call Agenda - Tue., Jan 14th, 2014
- From: Andrew Jones <drjones@xxxxxxxxxx>
- [PATCH TRIVIAL] ARM: KVM: Spelling s/auxilliary/auxiliary/
- From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
- KVM/ARM Call Agenda - Tue., Jan 14th, 2014
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 06/10] target-arm: A64: Add SIMD ZIP/UZP/TRN
- From: Alex Bennée <alex.bennee@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 03/10] target-arm: A64: Add decode skeleton for SIMD data processing insns
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 10/10] target-arm: A64: Add SIMD scalar copy instructions
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 09/10] target-arm: A64: Add SIMD modified immediate group
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 08/10] target-arm: A64: Add SIMD copy operations
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 07/10] target-arm: A64: Add SIMD across-lanes instructions
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 06/10] target-arm: A64: Add SIMD ZIP/UZP/TRN
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 05/10] target-arm: A64: Add SIMD TBL/TBLX
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 04/10] target-arm: A64: Add SIMD EXT
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 03/10] target-arm: A64: Add decode skeleton for SIMD data processing insns
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 01/10] target-arm: A64: Add SIMD ld/st multiple
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 03/10] target-arm: A64: Add decode skeleton for SIMD data processing insns
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 01/10] target-arm: A64: Add SIMD ld/st multiple
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 01/10] target-arm: A64: Add SIMD ld/st multiple
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 01/10] target-arm: A64: Add SIMD ld/st multiple
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 02/10] target-arm: A64: Add SIMD ld/st single
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 01/10] target-arm: A64: Add SIMD ld/st multiple
- From: Richard Henderson <rth@xxxxxxxxxxx>
- [PATCH 09/10] target-arm: A64: Add SIMD modified immediate group
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 07/10] target-arm: A64: Add SIMD across-lanes instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 10/10] target-arm: A64: Add SIMD scalar copy instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 05/10] target-arm: A64: Add SIMD TBL/TBLX
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 03/10] target-arm: A64: Add decode skeleton for SIMD data processing insns
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 02/10] target-arm: A64: Add SIMD ld/st single
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 01/10] target-arm: A64: Add SIMD ld/st multiple
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 08/10] target-arm: A64: Add SIMD copy operations
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 06/10] target-arm: A64: Add SIMD ZIP/UZP/TRN
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 00/10] A64 SIMD patchset one: ld/st, C3.6.1..C3.6.7
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 04/10] target-arm: A64: Add SIMD EXT
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v3 0/2] PSCI system off and reset for KVM ARM/ARM64
- From: Rob Herring <robherring2@xxxxxxxxx>
- [PATCH 1/5] arm/arm64: kvm: Use virt_to_idmap instead of virt_to_phys for idmap mappings
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH 2/5] KVM: Documentation: Fix typo for KVM_ARM_VCPU_INIT ioctl
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH 5/5] KVM: ARM: Remove duplicate include
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH 3/5] arm: KVM: Don't return PSCI_INVAL if waitqueue is inactive
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH 4/5] arm/arm64: KVM: relax the requirements of VMA alignment for THP
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [GIT PULL] KVM/ARM Updates for 3.14
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH v3 0/2] PSCI system off and reset for KVM ARM/ARM64
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH 1/1] KVM: ARM: Remove duplicate include
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 0/4] disas: add libvixl to support A64 disassembly
- From: Alexander Graf <agraf@xxxxxxx>
- Re: [Qemu-devel] [PATCH 0/4] disas: add libvixl to support A64 disassembly
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 0/4] disas: add libvixl to support A64 disassembly
- From: Alex Bennée <alex.bennee@xxxxxxxxxx>
- Re: [PATCH 0/4] disas: add libvixl to support A64 disassembly
- From: Alex Bennée <alex.bennee@xxxxxxxxxx>
- Re: [PATCH 0/4] disas: add libvixl to support A64 disassembly
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH 0/4] disas: add libvixl to support A64 disassembly
- From: Stefan Weil <sw@xxxxxxxxxxx>
- Re: [PATCH 0/4] disas: add libvixl to support A64 disassembly
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH 0/4] disas: add libvixl to support A64 disassembly
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH 0/4] disas: add libvixl to support A64 disassembly
- From: Stefan Weil <sw@xxxxxxxxxxx>
- Re: [PATCH 0/4] disas: add libvixl to support A64 disassembly
- From: Stefan Weil <sw@xxxxxxxxxxx>
- [PATCH 2/4] rules.mak: Link with C++ if we have a C++ compiler
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 1/4] rules.mak: Support .cc as a C++ source file suffix
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 4/4] disas: Implement disassembly output for A64
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 0/4] disas: add libvixl to support A64 disassembly
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH 3/4] disas: add libvixl source code for AArch64 A64 disassembler
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH v3 0/2] PSCI system off and reset for KVM ARM/ARM64
- From: Mark Rutland <mark.rutland@xxxxxxx>
- [PATCH 1/1] KVM: ARM: Remove duplicate include
- From: Sachin Kamat <sachin.kamat@xxxxxxxxxx>
- Re: [PATCH REPOST 5/5] ARM: kvm MMIO support BE host running LE code
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [PATCH REPOST 5/5] ARM: kvm MMIO support BE host running LE code
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- Re: [PATCH REPOST 5/5] ARM: kvm MMIO support BE host running LE code
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH REPOST 5/5] ARM: kvm MMIO support BE host running LE code
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- Re: [PATCH v2 24/24] target-arm: A64: Add support for FCVT between half, single and double
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 23/24] target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructions
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 22/24] target-arm: A64: Add floating-point<->integer conversion instructions
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 21/24] target-arm: A64: Add "Floating-point<->fixed-point" instructions
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 17/24] target-arm: Prepare VFP_CONV_FIX helpers for A64 uses
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 16/24] softfloat: Add support for ties-away rounding
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 15/24] softfloat: Refactor code handling various rounding modes
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 14/24] softfloat: Add float16 <=> float64 conversion functions
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 13/24] softfloat: Factor out RoundAndPackFloat16 and NormalizeFloat16Subnormal
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 08/24] softfloat: Add float32_to_uint64()
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 06/24] softfloat: Only raise Invalid when conversions to int are out of range
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 05/24] softfloat: Fix float64_to_uint64
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH REPOST 5/5] ARM: kvm MMIO support BE host running LE code
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- Re: [PATCH v2 04/24] softfloat: Make the int-to-float functions take exact-width types
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 03/24] softfloat: Add 16 bit integer to float conversions
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH v2 01/24] softfloat: Fix exception flag handling for float32_to_float16()
- From: Richard Henderson <rth@xxxxxxxxxxx>
- Re: [PATCH REPOST 5/5] ARM: kvm MMIO support BE host running LE code
- From: Victor Kamensky <victor.kamensky@xxxxxxxxxx>
- [PATCH 1/5] kvm tools: arm: extract common timer support code for ARM cpus
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 3/5] kvm tools: arm: emit the MPIDR in DT instead of cpu_id
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 5/5] kvm tools: arm: add option to override generic timer frequency
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 4/5] kvm tools: support unsigned int options
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 0/5] kvm tools: arm/arm64 updates
- From: Will Deacon <will.deacon@xxxxxxx>
- [PATCH 2/5] kvm tools: arm: add support for ARM Cortex-A7
- From: Will Deacon <will.deacon@xxxxxxx>
- Re: [RFC PATCH v4 0/8] Support arm-gic-kvm save/restore
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
- [PATCH v2 12/24] softfloat: Provide complete set of accessors for fp state
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 09/24] softfloat: Fix float64_to_uint64_round_to_zero
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 08/24] softfloat: Add float32_to_uint64()
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 05/24] softfloat: Fix float64_to_uint64
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 11/24] softfloat: Fix float64_to_uint32_round_to_zero
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 07/24] softfloat: Fix factor 2 error for scalbn on denormal inputs
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 13/24] softfloat: Factor out RoundAndPackFloat16 and NormalizeFloat16Subnormal
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 20/24] target-arm: A64: Add extra VFP fixed point conversion helpers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 21/24] target-arm: A64: Add "Floating-point<->fixed-point" instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 19/24] target-arm: Ignore most exceptions from scalbn when doing fixpoint conversion
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 14/24] softfloat: Add float16 <=> float64 conversion functions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 00/24] A64 decoder patchset 6: rest of floating point
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 03/24] softfloat: Add 16 bit integer to float conversions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 18/24] target-arm: Rename A32 VFP conversion helpers
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 04/24] softfloat: Make the int-to-float functions take exact-width types
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 10/24] softfloat: Fix float64_to_uint32
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 17/24] target-arm: Prepare VFP_CONV_FIX helpers for A64 uses
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 06/24] softfloat: Only raise Invalid when conversions to int are out of range
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 01/24] softfloat: Fix exception flag handling for float32_to_float16()
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 16/24] softfloat: Add support for ties-away rounding
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 23/24] target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 22/24] target-arm: A64: Add floating-point<->integer conversion instructions
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 24/24] target-arm: A64: Add support for FCVT between half, single and double
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 15/24] softfloat: Refactor code handling various rounding modes
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2 02/24] softfloat: Add float to 16bit integer conversions.
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [PATCH REPOST 5/5] ARM: kvm MMIO support BE host running LE code
- From: Marc Zyngier <marc.zyngier@xxxxxxx>
- Re: [RFC PATCH v4 0/8] Support arm-gic-kvm save/restore
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v2 12/25] target-arm: Update generic cpreg code for AArch64
- From: Peter Crosthwaite <peter.crosthwaite@xxxxxxxxxx>
- Re: [Qemu-devel] [PATCH v2 12/25] target-arm: Update generic cpreg code for AArch64
- From: Peter Maydell <peter.maydell@xxxxxxxxxx>
- [PATCH v2] ARM: mm: Fix stage-2 device memory attributes
- From: Christoffer Dall <christoffer.dall@xxxxxxxxxx>
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