On 21 December 2013 06:09, Christoffer Dall <christoffer.dall@xxxxxxxxxx> wrote: > Right now the arm gic emulation doesn't keep track of the source of an > SGI (which apparently Linux guests don't use, or they're fine with > assuming CPU 0 always). > > Add the necessary matrix on the GICState structure and maintain the data > when setting and clearing the pending state of an IRQ. > > Note that we always choose to present the source as the lowest-numbered > CPU in case multiple cores have signalled the same SGI number to a core > on the system. This new state should be guest-visible for a v2 GIC (but not v1 or 11mpcore) via GICD_SPENDSGIR and GICD_CPENDSGIR, right? An implementation of the read/write would be nice if it's not too hard, or failing that at least a LOG_UNIMP. Other than that, looks OK, though I see one set of missing braces and it'll need to be tweaked a little given the changes to patch 3. thanks -- PMM _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/cucslists/listinfo/kvmarm
