Re: [Qemu-devel] [PATCH 05/24] target-arm: Add exception level to the AArch64 TB flags

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On 28 January 2014 01:28, Peter Crosthwaite
<peter.crosthwaite@xxxxxxxxxx> wrote:
> On Wed, Jan 22, 2014 at 6:12 AM, Peter Maydell <peter.maydell@xxxxxxxxxx> wrote:
>> We already implicitly rely on the exception level being
>> part of the TB flags for coprocessor access,
>
> Maybe that's the issue? Why not just treat the exception level as
> state like any other and generate the TCG to just check it at
> execution time?

That would be ferociously expensive, because "am I privileged
or not?" is baked into every single guest load or store.
Including privilege level in the tb flags is standard for
every target CPU we have.

thanks
-- PMM
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