Re: [Qemu-devel] [PATCH 03/10] target-arm: A64: Add decode skeleton for SIMD data processing insns

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On 01/10/2014 09:12 AM, Peter Maydell wrote:
>  static void disas_data_proc_simd(DisasContext *s, uint32_t insn)
>  {
>      /* Note that this is called with all non-FP cases from
>       * table C3-6 so it must UNDEF for entries not specifically
>       * allocated to instructions in that table.
>       */
> -    unsupported_encoding(s, insn);
> +    AArch64DecodeFn *fn = lookup_disas_fn(&data_proc_simd[0], insn);
> +    if (fn) {
> +        (fn) (s, insn);

Oh, do you want to CheckFPAdvSIMDEnabled64 here before calling fn?
Otherwise that's the first thing I noticed missing from patch 4.


r~
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