Linux Arch

• Thread Index

• [PATCH 3/8] include: move find.h from asm_generic to linux
  • From: Yury Norov <yury.norov@xxxxxxxxx>
• [PATCH 2/8] bitops: move find_bit_*_le functions from le.h to find.h
  • From: Yury Norov <yury.norov@xxxxxxxxx>
• Re: [PATCH v3 5/9] mm: remove CONFIG_DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• Re: [PATCH 09/16] ps3disk: use memcpy_{from,to}_bvec
  • From: Ira Weiny <ira.weiny@xxxxxxxxx>
• Re: Kernel stack read with PTRACE_EVENT_EXIT and io_uring threads
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: Kernel stack read with PTRACE_EVENT_EXIT and io_uring threads
  • From: ebiederm@xxxxxxxxxxxx (Eric W. Biederman)
• Re: [PATCH v3 5/9] mm: remove CONFIG_DISCONTIGMEM
  • From: Stephen Brennan <stephen@xxxxxxxxxx>
• Re: [PATCH v9 00/20] Add support for 32-bit tasks on asymmetric AArch32 systems
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v8 0/8] Fork brute force attack mitigation
  • From: John Wood <john.wood@xxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: David Howells <dhowells@xxxxxxxxxx>
• Re: [PATCH v5 1/3] riscv: Move kernel mapping outside of linear mapping
  • From: Guenter Roeck <linux@xxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: "Enrico Weigelt, metux IT consult" <lkml@xxxxxxxxx>
• Re: [PATCH v2 2/7] sched: Introduce task_is_running()
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Willy Tarreau <w@xxxxxx>
• Re: [PATCH v2 2/7] sched: Introduce task_is_running()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Mauro Carvalho Chehab <mchehab@xxxxxxxxxx>
• Re: [PATCH v2 2/7] sched: Introduce task_is_running()
  • From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
• [PATCH v2 6/7] sched,arch: Remove unused TASK_STATE offsets
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• [PATCH v2 2/7] sched: Introduce task_is_running()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• [PATCH v2 3/7] sched,perf,kvm: Fix preemption condition
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• [PATCH v2 7/7] sched: Change task_struct::state
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• [PATCH v2 0/7] Cleanup task_struct::state
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• [PATCH v2 5/7] sched,timer: Use __set_current_state()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• [PATCH v2 1/7] sched: Unbreak wakeups
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• [PATCH v2 4/7] sched: Add get_current_state()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH 09/16] ps3disk: use memcpy_{from,to}_bvec
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Willy Tarreau <w@xxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Toke Høiland-Jørgensen <toke@xxxxxxxxxx>
• Re: Kernel stack read with PTRACE_EVENT_EXIT and io_uring threads
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Kernel stack read with PTRACE_EVENT_EXIT and io_uring threads
  • From: ebiederm@xxxxxxxxxxxx (Eric W. Biederman)
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Steven Rostedt <rostedt@xxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Matthew Wilcox <willy@xxxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Steven Rostedt <rostedt@xxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Shuah Khan <skhan@xxxxxxxxxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Steven Rostedt <rostedt@xxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Konstantin Ryabitsev <konstantin@xxxxxxxxxxxxxxxxxxx>
• Re: [PATCH v2 3/3] elf: Remove has_interp property from arch_adjust_elf_prot()
  • From: "Yu, Yu-cheng" <yu-cheng.yu@xxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: "Enrico Weigelt, metux IT consult" <lkml@xxxxxxxxx>
• Re: [PATCH v5 1/3] riscv: Move kernel mapping outside of linear mapping
  • From: Andreas Schwab <schwab@xxxxxxxxxxxxxx>
• Re: [PATCH v5 1/3] riscv: Move kernel mapping outside of linear mapping
  • From: Guenter Roeck <linux@xxxxxxxxxxxx>
• Re: [PATCH v5 1/3] riscv: Move kernel mapping outside of linear mapping
  • From: Andreas Schwab <schwab@xxxxxxxxxxxxxx>
• Re: [PATCH v5 1/3] riscv: Move kernel mapping outside of linear mapping
  • From: Guenter Roeck <linux@xxxxxxxxxxxx>
• Re: [PATCH v2 0/3] arm64: Enable BTI for the executable as well as the interpreter
  • From: Jeremy Linton <jeremy.linton@xxxxxxx>
• Re: [PATCH v5 1/3] riscv: Move kernel mapping outside of linear mapping
  • From: Andreas Schwab <schwab@xxxxxxxxxxxxxx>
• Re: [PATCH v2 3/3] elf: Remove has_interp property from arch_adjust_elf_prot()
  • From: Dave Martin <Dave.Martin@xxxxxxx>
• Re: [PATCH v2 2/3] arm64: Enable BTI for main executable as well as the interpreter
  • From: Dave Martin <Dave.Martin@xxxxxxx>
• Re: [RFC PATCH V3 08/11] swiotlb: Add bounce buffer remap address setting function
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• Re: [RFC PATCH V3 03/11] x86/Hyper-V: Add new hvcall guest address host visibility support
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• Re: [RFC PATCH V3 04/11] HV: Add Write/Read MSR registers via ghcb
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• Re: [RFC PATCH V3 01/11] x86/HV: Initialize GHCB page in Isolation VM
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• Re: [PATCH v2 2/3] arm64: Enable BTI for main executable as well as the interpreter
  • From: Mark Brown <broonie@xxxxxxxxxx>
• Re: [PATCH v2 1/3] elf: Allow architectures to parse properties on the main executable
  • From: Mark Brown <broonie@xxxxxxxxxx>
• Re: [PATCH v2 3/3] elf: Remove has_interp property from arch_adjust_elf_prot()
  • From: Mark Brown <broonie@xxxxxxxxxx>
• Re: [PATCH v9 12/20] sched: Allow task CPU affinity to be restricted on asymmetric systems
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• Re: [PATCH v9 08/20] cpuset: Cleanup cpuset_cpus_allowed_fallback() use in select_fallback_rq()
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• Re: [PATCH v9 06/20] cpuset: Don't use the cpu_possible_mask as a last resort for cgroup v1
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• Re: [PATCH v1 2/2] arm64: Enable BTI for main executable as well as the interpreter
  • From: Dave Martin <Dave.Martin@xxxxxxx>
• Re: [PATCH v8 11/19] sched: Allow task CPU affinity to be restricted on asymmetric systems
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• Re: [PATCH v8 06/19] cpuset: Don't use the cpu_possible_mask as a last resort for cgroup v1
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• Re: [PATCH v2 3/3] elf: Remove has_interp property from arch_adjust_elf_prot()
  • From: Dave Martin <Dave.Martin@xxxxxxx>
• Re: [RFC PATCH V3 10/11] HV/Netvsc: Add Isolation VM support for netvsc driver
  • From: Vitaly Kuznetsov <vkuznets@xxxxxxxxxx>
• Re: [RFC PATCH V3 03/11] x86/Hyper-V: Add new hvcall guest address host visibility support
  • From: Vitaly Kuznetsov <vkuznets@xxxxxxxxxx>
• Re: [PATCH V2] mm/thp: Define default pmd_pgtable()
  • From: Anshuman Khandual <anshuman.khandual@xxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: James Bottomley <James.Bottomley@xxxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Nick Desaulniers <ndesaulniers@xxxxxxxxxx>
• Re: [PATCH] all: remove GENERIC_FIND_FIRST_BIT
  • From: Yury Norov <yury.norov@xxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [PATCH v2 3/3] elf: Remove has_interp property from arch_adjust_elf_prot()
  • From: "Yu, Yu-cheng" <yu-cheng.yu@xxxxxxxxx>
• Re: [PATCH v8 0/8] Fork brute force attack mitigation
  • From: Kees Cook <keescook@xxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Marco Elver <elver@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [PATCH v2 3/3] elf: Remove has_interp property from arch_adjust_elf_prot()
  • From: Dave Martin <Dave.Martin@xxxxxxx>
• Re: [PATCH v2 2/3] arm64: Enable BTI for main executable as well as the interpreter
  • From: Dave Martin <Dave.Martin@xxxxxxx>
• Re: [PATCH v2 1/3] elf: Allow architectures to parse properties on the main executable
  • From: Dave Martin <Dave.Martin@xxxxxxx>
• Re: [PATCH v2 0/9] Remove DISCINTIGMEM memory model
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• Re: [RFC PATCH V3 05/11] HV: Add ghcb hvcall support for SNP VM
  • From: Joerg Roedel <joro@xxxxxxxxxx>
• Re: [RFC PATCH V3 04/11] HV: Add Write/Read MSR registers via ghcb
  • From: Joerg Roedel <joro@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Marco Elver <elver@xxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC PATCH V3 01/11] x86/HV: Initialize GHCB page in Isolation VM
  • From: Joerg Roedel <joro@xxxxxxxxxx>
• Re: [PATCH v2 0/9] Remove DISCINTIGMEM memory model
  • From: Arnd Bergmann <arnd@xxxxxxxx>
• Re: [PATCH 9/9] mm: replace CONFIG_FLAT_NODE_MEM_MAP with CONFIG_FLATMEM
  • From: David Hildenbrand <david@xxxxxxxxxx>
• Re: [PATCH 8/9] mm: replace CONFIG_NEED_MULTIPLE_NODES with CONFIG_NUMA
  • From: David Hildenbrand <david@xxxxxxxxxx>
• Re: [PATCH 7/9] docs: remove description of DISCONTIGMEM
  • From: David Hildenbrand <david@xxxxxxxxxx>
• Re: [PATCH 6/9] arch, mm: remove stale mentions of DISCONIGMEM
  • From: David Hildenbrand <david@xxxxxxxxxx>
• Re: [PATCH 5/9] mm: remove CONFIG_DISCONTIGMEM
  • From: David Hildenbrand <david@xxxxxxxxxx>
• Re: [PATCH 3/9] arc: remove support for DISCONTIGMEM
  • From: David Hildenbrand <david@xxxxxxxxxx>
• Re: [PATCH 2/9] arc: update comment about HIGHMEM implementation
  • From: David Hildenbrand <david@xxxxxxxxxx>
• Re: [PATCH 1/9] alpha: remove DISCONTIGMEM and NUMA
  • From: David Hildenbrand <david@xxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Nick Kossifidis <mick@xxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: David Hildenbrand <david@xxxxxxxxxx>
• Re: [PATCH V2] mm/thp: Define default pmd_pgtable()
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• Re: [PATCH v3 8/9] mm: replace CONFIG_NEED_MULTIPLE_NODES with CONFIG_NUMA
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• Re: [PATCH V2] mm/thp: Define default pmd_pgtable()
  • From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Jisheng Zhang <Jisheng.Zhang@xxxxxxxxxxxxx>
• [PATCH V2] mm/thp: Define default pmd_pgtable()
  • From: Anshuman Khandual <anshuman.khandual@xxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Guo Ren <guoren@xxxxxxxxxx>
• [asm-generic:clkdev] BUILD SUCCESS 5617c9125bb66a923f3560d5739eb7f3a21c00b5
  • From: kernel test robot <lkp@xxxxxxxxx>
• Re: [PATCH v3 8/9] mm: replace CONFIG_NEED_MULTIPLE_NODES with CONFIG_NUMA
  • From: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>
• Re: [PATCH V2 1/2] riscv: Cleanup unused functions
  • From: Palmer Dabbelt <palmerdabbelt@xxxxxxxxxx>
• Re: [PATCH v8 0/8] Fork brute force attack mitigation
  • From: Andi Kleen <ak@xxxxxxxxxxxxxxx>
• Re: [PATCH v8 0/8] Fork brute force attack mitigation
  • From: Kees Cook <keescook@xxxxxxxxxxxx>
• [PATCH v9 20/20] Documentation: arm64: describe asymmetric 32-bit support
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 19/20] arm64: Remove logic to kill 32-bit tasks on 64-bit-only cores
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 18/20] arm64: Hook up cmdline parameter to allow mismatched 32-bit EL0
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 17/20] arm64: Advertise CPUs capable of running 32-bit applications in sysfs
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 16/20] arm64: Prevent offlining first CPU with 32-bit EL0 on mismatched system
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 15/20] arm64: exec: Adjust affinity for compat tasks with mismatched 32-bit EL0
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 14/20] arm64: Implement task_cpu_possible_mask()
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 13/20] sched: Introduce dl_task_check_affinity() to check proposed affinity
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 12/20] sched: Allow task CPU affinity to be restricted on asymmetric systems
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 11/20] sched: Split the guts of sched_setaffinity() into a helper function
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 10/20] sched: Introduce task_struct::user_cpus_ptr to track requested affinity
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 09/20] sched: Reject CPU affinity changes based on task_cpu_possible_mask()
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 08/20] cpuset: Cleanup cpuset_cpus_allowed_fallback() use in select_fallback_rq()
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 07/20] cpuset: Honour task_cpu_possible_mask() in guarantee_online_cpus()
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 06/20] cpuset: Don't use the cpu_possible_mask as a last resort for cgroup v1
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 05/20] sched: Introduce task_cpu_possible_mask() to limit fallback rq selection
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 04/20] arm64: Kill 32-bit applications scheduled on 64-bit-only CPUs
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 03/20] KVM: arm64: Kill 32-bit vCPUs on systems with mismatched EL0 support
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 02/20] arm64: Allow mismatched 32-bit EL0 support
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 01/20] arm64: cpuinfo: Split AArch32 registers out into a separate struct
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v9 00/20] Add support for 32-bit tasks on asymmetric AArch32 systems
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v4 2/4] lazy tlb: allow lazy tlb mm refcounting to be configurable
  • From: Andy Lutomirski <luto@xxxxxxxxxx>
• RE: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: David Laight <David.Laight@xxxxxxxxxx>
• [PATCH] madvise.2: Document MADV_POPULATE_READ and MADV_POPULATE_WRITE
  • From: David Hildenbrand <david@xxxxxxxxxx>
• Re: [PATCH v1 2/2] arm64: Enable BTI for main executable as well as the interpreter
  • From: Jeremy Linton <jeremy.linton@xxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: "'Christoph Hellwig'" <hch@xxxxxx>
• Re: [PATCH v1 2/2] arm64: Enable BTI for main executable as well as the interpreter
  • From: Dave Martin <Dave.Martin@xxxxxxx>
• RE: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: David Laight <David.Laight@xxxxxxxxxx>
• RE: [RFC] LKMM: Add volatile_if()
  • From: David Laight <David.Laight@xxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH v1 2/2] arm64: Enable BTI for main executable as well as the interpreter
  • From: Mark Brown <broonie@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Marco Elver <elver@xxxxxxxxxx>
• [PATCH v3 9/9] mm: replace CONFIG_FLAT_NODE_MEM_MAP with CONFIG_FLATMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v3 8/9] mm: replace CONFIG_NEED_MULTIPLE_NODES with CONFIG_NUMA
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v3 7/9] docs: remove description of DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v3 6/9] arch, mm: remove stale mentions of DISCONIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v3 5/9] mm: remove CONFIG_DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v3 4/9] m68k: remove support for DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v3 3/9] arc: remove support for DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v3 2/9] arc: update comment about HIGHMEM implementation
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v3 1/9] alpha: remove DISCONTIGMEM and NUMA
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v3 0/9] Remove DISCONTIGMEM memory model
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• Re: [PATCH] mm/thp: Define default pmd_pgtable()
  • From: Anshuman Khandual <anshuman.khandual@xxxxxxx>
• Re: [PATCH] mm/thp: Define default pmd_pgtable()
  • From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
• Re: [PATCH v2 8/9] mm: replace CONFIG_NEED_MULTIPLE_NODES with CONFIG_NUMA
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH] mm/thp: Define default pmd_pgtable()
  • From: Anshuman Khandual <anshuman.khandual@xxxxxxx>
• Re: [PATCH v4 1/4] lazy tlb: introduce lazy mm refcount helper functions
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• Re: [PATCH v4 3/4] lazy tlb: shoot lazies, a non-refcounting lazy tlb option
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• Re: [PATCH v4 2/4] lazy tlb: allow lazy tlb mm refcounting to be configurable
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• Re: [PATCH v4 4/4] powerpc/64s: enable MMU_LAZY_TLB_SHOOTDOWN
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• Re: [PATCH v4 1/4] lazy tlb: introduce lazy mm refcount helper functions
  • From: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>
• Re: [PATCH v4 1/4] lazy tlb: introduce lazy mm refcount helper functions
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• Re: [PATCH v4 4/4] powerpc/64s: enable MMU_LAZY_TLB_SHOOTDOWN
  • From: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>
• Re: [PATCH v4 1/4] lazy tlb: introduce lazy mm refcount helper functions
  • From: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [PATCH v8 11/19] sched: Allow task CPU affinity to be restricted on asymmetric systems
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [PATCH v8 08/19] sched: Reject CPU affinity changes based on task_cpu_possible_mask()
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [PATCH v1 2/2] arm64: Enable BTI for main executable as well as the interpreter
  • From: Catalin Marinas <catalin.marinas@xxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alexander Monakov <amonakov@xxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [PATCH v8 06/19] cpuset: Don't use the cpu_possible_mask as a last resort for cgroup v1
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Marco Elver <elver@xxxxxxxxxx>
• Re: [PATCH v8 05/19] sched: Introduce task_cpu_possible_mask() to limit fallback rq selection
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH] all: remove GENERIC_FIND_FIRST_BIT
  • From: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC PATCH V3 10/11] HV/Netvsc: Add Isolation VM support for netvsc driver
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• Re: [RFC PATCH V3 11/11] HV/Storvsc: Add Isolation VM support for storvsc driver
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• Re: [RFC PATCH V3 08/11] swiotlb: Add bounce buffer remap address setting function
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC PATCH v2 10/11] riscv: soc: Add Allwinner SoC kconfig option
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC PATCH v2 10/11] riscv: soc: Add Allwinner SoC kconfig option
  • From: Maxime Ripard <maxime@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v1 2/2] arm64: Enable BTI for main executable as well as the interpreter
  • From: Dave Martin <Dave.Martin@xxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH v2 8/9] mm: replace CONFIG_NEED_MULTIPLE_NODES with CONFIG_NUMA
  • From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
• Re: [PATCH v2 0/9] Remove DISCINTIGMEM memory model
  • From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Nick Kossifidis <mick@xxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Marco Elver <elver@xxxxxxxxxx>
• Re: [RFC PATCH V3 01/11] x86/HV: Initialize GHCB page in Isolation VM
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• Re: [RFC PATCH v2 09/11] riscv: soc: Initial DTS for Allwinner D1 NeZha board
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alexander Monakov <amonakov@xxxxxxxxx>
• Re: [RFC PATCH v2 09/11] riscv: soc: Initial DTS for Allwinner D1 NeZha board
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC PATCH v2 10/11] riscv: soc: Add Allwinner SoC kconfig option
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC PATCH v2 10/11] riscv: soc: Add Allwinner SoC kconfig option
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC PATCH v2 10/11] riscv: soc: Add Allwinner SoC kconfig option
  • From: Arnd Bergmann <arnd@xxxxxxxx>
• Re: [RFC PATCH v2 09/11] riscv: soc: Initial DTS for Allwinner D1 NeZha board
  • From: Maxime Ripard <maxime@xxxxxxxxxx>
• Re: [RFC PATCH v2 09/11] riscv: soc: Initial DTS for Allwinner D1 NeZha board
  • From: Maxime Ripard <maxime@xxxxxxxxxx>
• Re: [RFC PATCH v2 10/11] riscv: soc: Add Allwinner SoC kconfig option
  • From: Maxime Ripard <maxime@xxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [RFC PATCH V3 10/11] HV/Netvsc: Add Isolation VM support for netvsc driver
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [RFC PATCH V3 11/11] HV/Storvsc: Add Isolation VM support for storvsc driver
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [RFC PATCH V3 09/11] HV/IOMMU: Enable swiotlb bounce buffer for Isolation VM
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [RFC PATCH V3 08/11] swiotlb: Add bounce buffer remap address setting function
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [RFC PATCH V3 01/11] x86/HV: Initialize GHCB page in Isolation VM
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [RFC PATCH v2 06/11] riscv: pgtable: Add DMA_COHERENT with custom PTE attributes
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Guo Ren <guoren@xxxxxxxxxx>
• RE: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Anup Patel <Anup.Patel@xxxxxxx>
• Re: [RFC PATCH v2 00/11] riscv: Add DMA_COHERENT support for Allwinner D1
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Guo Ren <guoren@xxxxxxxxxx>
• RE: [RFC PATCH v2 00/11] riscv: Add DMA_COHERENT support for Allwinner D1
  • From: Anup Patel <Anup.Patel@xxxxxxx>
• Re: [RFC PATCH v2 09/11] riscv: soc: Initial DTS for Allwinner D1 NeZha board
  • From: Guo Ren <guoren@xxxxxxxxxx>
• RE: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Anup Patel <Anup.Patel@xxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Nick Kossifidis <mick@xxxxxxxxxxxx>
• Re: LoongArch (was: Re: [PATCH V2 2/4] PCI: Move loongson pci quirks to quirks.c)
  • From: Huacai Chen <chenhuacai@xxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Rasmus Villemoes <linux@xxxxxxxxxxxxxxxxxx>
• Re: [RFC PATCH v2 00/11] riscv: Add DMA_COHERENT support for Allwinner D1
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Rasmus Villemoes <linux@xxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alexander Monakov <amonakov@xxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Jakub Jelinek <jakub@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Nick Kossifidis <mick@xxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC PATCH v2 06/11] riscv: pgtable: Add DMA_COHERENT with custom PTE attributes
  • From: Nick Kossifidis <mick@xxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC PATCH v2 00/11] riscv: Add DMA_COHERENT support for Allwinner D1
  • From: Jernej Škrabec <jernej.skrabec@xxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC PATCH v2 09/11] riscv: soc: Initial DTS for Allwinner D1 NeZha board
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC PATCH v2 00/11] riscv: Add DMA_COHERENT support for Allwinner D1
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC PATCH v2 11/11] riscv: soc: Allwinner D1 GMAC driver only for temp use
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC PATCH v2 11/11] riscv: soc: Allwinner D1 GMAC driver only for temp use
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC PATCH v2 11/11] riscv: soc: Allwinner D1 GMAC driver only for temp use
  • From: Jernej Škrabec <jernej.skrabec@xxxxxxxxx>
• Re: [RFC PATCH v2 00/11] riscv: Add DMA_COHERENT support for Allwinner D1
  • From: Jernej Škrabec <jernej.skrabec@xxxxxxxxx>
• Re: [RFC PATCH v2 09/11] riscv: soc: Initial DTS for Allwinner D1 NeZha board
  • From: Jernej Škrabec <jernej.skrabec@xxxxxxxxx>
• Re: [RFC PATCH v2 11/11] riscv: soc: Allwinner D1 GMAC driver only for temp use
  • From: Arnd Bergmann <arnd@xxxxxxxx>
• Re: [RFC PATCH v2 11/11] riscv: soc: Allwinner D1 GMAC driver only for temp use
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC PATCH v2 11/11] riscv: soc: Allwinner D1 GMAC driver only for temp use
  • From: Jernej Škrabec <jernej.skrabec@xxxxxxxxx>
• Re: [RFC PATCH v2 06/11] riscv: pgtable: Add DMA_COHERENT with custom PTE attributes
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC PATCH v2 06/11] riscv: pgtable: Add DMA_COHERENT with custom PTE attributes
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [PATCH V5 2/3] riscv: Add ASID-based tlbflushing methods
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC PATCH v2 11/11] riscv: soc: Allwinner D1 GMAC driver only for temp use
  • From: Andre Przywara <andre.przywara@xxxxxxx>
• [RFC PATCH v2 11/11] riscv: soc: Allwinner D1 GMAC driver only for temp use
  • From: guoren@xxxxxxxxxx
• [RFC PATCH v2 10/11] riscv: soc: Add Allwinner SoC kconfig option
  • From: guoren@xxxxxxxxxx
• [RFC PATCH v2 09/11] riscv: soc: Initial DTS for Allwinner D1 NeZha board
  • From: guoren@xxxxxxxxxx
• [RFC PATCH v2 08/11] riscv: cmo: Add vendor custom icache sync
  • From: guoren@xxxxxxxxxx
• [RFC PATCH v2 07/11] riscv: cmo: Add dma-noncoherency support
  • From: guoren@xxxxxxxxxx
• [RFC PATCH v2 06/11] riscv: pgtable: Add DMA_COHERENT with custom PTE attributes
  • From: guoren@xxxxxxxxxx
• [RFC PATCH v2 05/11] riscv: pgtable: Add custom protection_map init
  • From: guoren@xxxxxxxxxx
• [RFC PATCH v2 04/11] riscv: pgtable: Fixup _PAGE_CHG_MASK usage
  • From: guoren@xxxxxxxxxx
• [PATCH V5 3/3] riscv: tlbflush: Optimize coding convention
  • From: guoren@xxxxxxxxxx
• [RFC PATCH v2 03/11] riscv: asid: Optimize tlbflush coding convention
  • From: guoren@xxxxxxxxxx
• [RFC PATCH v2 02/11] riscv: asid: Add ASID-based tlbflushing methods
  • From: guoren@xxxxxxxxxx
• [PATCH V5 2/3] riscv: Add ASID-based tlbflushing methods
  • From: guoren@xxxxxxxxxx
• [PATCH V5 1/3] riscv: Use global mappings for kernel pages
  • From: guoren@xxxxxxxxxx
• [RFC PATCH v2 01/11] riscv: asid: Use global mappings for kernel pages
  • From: guoren@xxxxxxxxxx
• [RFC PATCH v2 00/11] riscv: Add DMA_COHERENT support for Allwinner D1
  • From: guoren@xxxxxxxxxx
• LoongArch (was: Re: [PATCH V2 2/4] PCI: Move loongson pci quirks to quirks.c)
  • From: "Jiaxun Yang" <jiaxun.yang@xxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• [PATCH v8 8/8] MAINTAINERS: Add a new entry for the Brute LSM
  • From: John Wood <john.wood@xxxxxxx>
• [PATCH v8 7/8] Documentation: Add documentation for the Brute LSM
  • From: John Wood <john.wood@xxxxxxx>
• [PATCH v8 6/8] selftests/brute: Add tests for the Brute LSM
  • From: John Wood <john.wood@xxxxxxx>
• [PATCH v8 5/8] security/brute: Notify to userspace "task killed"
  • From: John Wood <john.wood@xxxxxxx>
• [PATCH v8 4/8] security/brute: Mitigate a brute force attack
  • From: John Wood <john.wood@xxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• [PATCH v8 3/8] security/brute: Detect a brute force attack
  • From: John Wood <john.wood@xxxxxxx>
• [PATCH v8 2/8] security/brute: Define a LSM and add sysctl attributes
  • From: John Wood <john.wood@xxxxxxx>
• [PATCH v8 1/8] security: Add LSM hook at the point where a task gets a fatal signal
  • From: John Wood <john.wood@xxxxxxx>
• [PATCH v8 0/8] Fork brute force attack mitigation
  • From: John Wood <john.wood@xxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
• Re: [PATCH v3 0/4] shoot lazy tlbs
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• [PATCH v4 0/4] shoot lazy tlbs
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• [PATCH v4 1/4] lazy tlb: introduce lazy mm refcount helper functions
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• [PATCH v4 4/4] powerpc/64s: enable MMU_LAZY_TLB_SHOOTDOWN
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• [PATCH v4 3/4] lazy tlb: shoot lazies, a non-refcounting lazy tlb option
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• [PATCH v4 2/4] lazy tlb: allow lazy tlb mm refcounting to be configurable
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• Re: [PATCH v3 0/4] shoot lazy tlbs
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• Re: [PATCH v3 0/4] shoot lazy tlbs
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Palmer Dabbelt <palmer@xxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Arnd Bergmann <arnd@xxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [PATCH v8 11/19] sched: Allow task CPU affinity to be restricted on asymmetric systems
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• Re: [PATCH v8 10/19] sched: Split the guts of sched_setaffinity() into a helper function
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• Re: [PATCH v8 09/19] sched: Introduce task_struct::user_cpus_ptr to track requested affinity
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• Re: [PATCH v8 08/19] sched: Reject CPU affinity changes based on task_cpu_possible_mask()
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• Re: [PATCH v8 07/19] cpuset: Honour task_cpu_possible_mask() in guarantee_online_cpus()
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• Re: [PATCH v8 06/19] cpuset: Don't use the cpu_possible_mask as a last resort for cgroup v1
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [PATCH v8 05/19] sched: Introduce task_cpu_possible_mask() to limit fallback rq selection
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• Re: [PATCH v3 0/4] shoot lazy tlbs
  • From: Andy Lutomirski <luto@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [PATCH v3 0/4] shoot lazy tlbs
  • From: Andy Lutomirski <luto@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Palmer Dabbelt <palmer@xxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Segher Boessenkool <segher@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v2 3/9] arc: remove support for DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: "Paul E. McKenney" <paulmck@xxxxxxxxxx>
• Re: [PATCH v2 3/9] arc: remove support for DISCONTIGMEM
  • From: Vineet Gupta <Vineet.Gupta1@xxxxxxxxxxxx>
• Re: [PATCH v2 2/9] arc: update comment about HIGHMEM implementation
  • From: Vineet Gupta <Vineet.Gupta1@xxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH v8 02/19] arm64: Allow mismatched 32-bit EL0 support
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v8 15/19] arm64: Prevent offlining first CPU with 32-bit EL0 on mismatched system
  • From: Qais Yousef <qais.yousef@xxxxxxx>
• Re: [PATCH v8 02/19] arm64: Allow mismatched 32-bit EL0 support
  • From: Mark Rutland <mark.rutland@xxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• [PATCH v2 3/3] elf: Remove has_interp property from arch_adjust_elf_prot()
  • From: Mark Brown <broonie@xxxxxxxxxx>
• [PATCH v2 2/3] arm64: Enable BTI for main executable as well as the interpreter
  • From: Mark Brown <broonie@xxxxxxxxxx>
• [PATCH v2 1/3] elf: Allow architectures to parse properties on the main executable
  • From: Mark Brown <broonie@xxxxxxxxxx>
• [PATCH v2 0/3] arm64: Enable BTI for the executable as well as the interpreter
  • From: Mark Brown <broonie@xxxxxxxxxx>
• [PATCH v1 3/3] elf: Remove has_interp property from arch_adjust_elf_prot()
  • From: Mark Brown <broonie@xxxxxxxxxx>
• [PATCH v1 2/3] arm64: Enable BTI for main executable as well as the interpreter
  • From: Mark Brown <broonie@xxxxxxxxxx>
• [PATCH v1 1/3] elf: Allow architectures to parse properties on the main executable
  • From: Mark Brown <broonie@xxxxxxxxxx>
• [PATCH v1 0/3] arm64: Enable BTI for the executable as well as the interpreter
  • From: Mark Brown <broonie@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v8 02/19] arm64: Allow mismatched 32-bit EL0 support
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [RFC] LKMM: Add volatile_if()
  • From: Will Deacon <will@xxxxxxxxxx>
• [RFC] LKMM: Add volatile_if()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Arnd Bergmann <arnd@xxxxxxxx>
• Re: [PATCH v8 15/19] arm64: Prevent offlining first CPU with 32-bit EL0 on mismatched system
  • From: Mark Rutland <mark.rutland@xxxxxxx>
• [asm-generic:clkdev] BUILD REGRESSION 84587cb0f9ed09b9b7f787276ef05beda4ae0ba8
  • From: kernel test robot <lkp@xxxxxxxxx>
• Re: [PATCH v8 02/19] arm64: Allow mismatched 32-bit EL0 support
  • From: Mark Rutland <mark.rutland@xxxxxxx>
• RE: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: David Laight <David.Laight@xxxxxxxxxx>
• [PATCH v2 9/9] mm: replace CONFIG_FLAT_NODE_MEM_MAP with CONFIG_FLATMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v2 8/9] mm: replace CONFIG_NEED_MULTIPLE_NODES with CONFIG_NUMA
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v2 7/9] docs: remove description of DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v2 6/9] arch, mm: remove stale mentions of DISCONIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v2 5/9] mm: remove CONFIG_DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v2 4/9] m68k: remove support for DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v2 3/9] arc: remove support for DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v2 2/9] arc: update comment about HIGHMEM implementation
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v2 1/9] alpha: remove DISCONTIGMEM and NUMA
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH v2 0/9] Remove DISCINTIGMEM memory model
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• Re: [PATCH v1 1/2] elf: Allow architectures to parse properties on the main executable
  • From: Mark Brown <broonie@xxxxxxxxxx>
• Re: [PATCH v1 2/2] arm64: Enable BTI for main executable as well as the interpreter
  • From: Catalin Marinas <catalin.marinas@xxxxxxx>
• Re: [PATCH v8 02/19] arm64: Allow mismatched 32-bit EL0 support
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v8 15/19] arm64: Prevent offlining first CPU with 32-bit EL0 on mismatched system
  • From: Will Deacon <will@xxxxxxxxxx>
• [asm-generic:clkdev 4/7] arch/m68k/coldfire/m525x.c:29:30: error: 'pll' undeclared here (not in a function)
  • From: kernel test robot <lkp@xxxxxxxxx>
• Re: [PATCH v8 01/19] arm64: cpuinfo: Split AArch32 registers out into a separate struct
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [RFC PATCH V3 09/11] HV/IOMMU: Enable swiotlb bounce buffer for Isolation VM
  • From: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>
• Re: [PATCH v1 2/2] arm64: Enable BTI for main executable as well as the interpreter
  • From: Mark Brown <broonie@xxxxxxxxxx>
• Re: [PATCH v1 2/2] arm64: Enable BTI for main executable as well as the interpreter
  • From: Dave Martin <Dave.Martin@xxxxxxx>
• Re: [PATCH v1 1/2] elf: Allow architectures to parse properties on the main executable
  • From: Dave Martin <Dave.Martin@xxxxxxx>
• RE: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Palmer Dabbelt <palmer@xxxxxxxxxxx>
• Re: [RFC PATCH V3 09/11] HV/IOMMU: Enable swiotlb bounce buffer for Isolation VM
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• Re: [PATCH v8 15/19] arm64: Prevent offlining first CPU with 32-bit EL0 on mismatched system
  • From: Mark Rutland <mark.rutland@xxxxxxx>
• Re: [PATCH v8 01/19] arm64: cpuinfo: Split AArch32 registers out into a separate struct
  • From: Mark Rutland <mark.rutland@xxxxxxx>
• Re: [PATCH v8 02/19] arm64: Allow mismatched 32-bit EL0 support
  • From: Mark Rutland <mark.rutland@xxxxxxx>
• Re: [RFC][PATCH] freezer,sched: Rewrite core freezer logic
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [RFC][PATCH] freezer,sched: Rewrite core freezer logic
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [RFC][PATCH] freezer,sched: Rewrite core freezer logic
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [RFC][PATCH] freezer,sched: Rewrite core freezer logic
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH v8 12/19] sched: Introduce task_cpus_dl_admissible() to check proposed affinity
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v8 14/19] arm64: exec: Adjust affinity for compat tasks with mismatched 32-bit EL0
  • From: Daniel Bristot de Oliveira <bristot@xxxxxxxxxx>
• Re: [PATCH v8 12/19] sched: Introduce task_cpus_dl_admissible() to check proposed affinity
  • From: Daniel Bristot de Oliveira <bristot@xxxxxxxxxx>
• RE: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Anup Patel <Anup.Patel@xxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Palmer Dabbelt <palmer@xxxxxxxxxxx>
• [PATCH v8 19/19] Documentation: arm64: describe asymmetric 32-bit support
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 18/19] arm64: Remove logic to kill 32-bit tasks on 64-bit-only cores
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 17/19] arm64: Hook up cmdline parameter to allow mismatched 32-bit EL0
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 16/19] arm64: Advertise CPUs capable of running 32-bit applications in sysfs
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 15/19] arm64: Prevent offlining first CPU with 32-bit EL0 on mismatched system
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 14/19] arm64: exec: Adjust affinity for compat tasks with mismatched 32-bit EL0
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 13/19] arm64: Implement task_cpu_possible_mask()
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 12/19] sched: Introduce task_cpus_dl_admissible() to check proposed affinity
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 11/19] sched: Allow task CPU affinity to be restricted on asymmetric systems
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 10/19] sched: Split the guts of sched_setaffinity() into a helper function
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 09/19] sched: Introduce task_struct::user_cpus_ptr to track requested affinity
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 08/19] sched: Reject CPU affinity changes based on task_cpu_possible_mask()
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 07/19] cpuset: Honour task_cpu_possible_mask() in guarantee_online_cpus()
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 06/19] cpuset: Don't use the cpu_possible_mask as a last resort for cgroup v1
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 05/19] sched: Introduce task_cpu_possible_mask() to limit fallback rq selection
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 04/19] arm64: Kill 32-bit applications scheduled on 64-bit-only CPUs
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 03/19] KVM: arm64: Kill 32-bit vCPUs on systems with mismatched EL0 support
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 02/19] arm64: Allow mismatched 32-bit EL0 support
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 01/19] arm64: cpuinfo: Split AArch32 registers out into a separate struct
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v8 00/19] Add support for 32-bit tasks on asymmetric AArch32 systems
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [RFC PATCH V3 09/11] HV/IOMMU: Enable swiotlb bounce buffer for Isolation VM
  • From: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>
• Re: [RFC PATCH V3 09/11] HV/IOMMU: Enable swiotlb bounce buffer for Isolation VM
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• Re: [PATCH 4/9] m68k: remove support for DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• Re: [RFC][PATCH] freezer,sched: Rewrite core freezer logic
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH 4/9] m68k: remove support for DISCONTIGMEM
  • From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
• [PATCH 9/9] mm: replace CONFIG_FLAT_NODE_MEM_MAP with CONFIG_FLATMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH 8/9] mm: replace CONFIG_NEED_MULTIPLE_NODES with CONFIG_NUMA
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH 7/9] docs: remove description of DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH 6/9] arch, mm: remove stale mentions of DISCONIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH 5/9] mm: remove CONFIG_DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH 4/9] m68k: remove support for DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH 3/9] arc: remove support for DISCONTIGMEM
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH 2/9] arc: update comment about HIGHMEM implementation
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH 1/9] alpha: remove DISCONTIGMEM and NUMA
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• [PATCH 0/9] Remove DISCINTIGMEM memory model
  • From: Mike Rapoport <rppt@xxxxxxxxxx>
• Re: [asm-generic:clkdev 5/7] arch/m68k/coldfire/m53xx.c:278:29: error: 'xC0000000' undeclared; did you mean 'B3000000'?
  • From: Arnd Bergmann <arnd@xxxxxxxx>
• Re: [RFC PATCH V3 09/11] HV/IOMMU: Enable swiotlb bounce buffer for Isolation VM
  • From: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>
• [asm-generic:clkdev 5/7] arch/m68k/coldfire/m53xx.c:278:29: error: 'xC0000000' undeclared; did you mean 'B3000000'?
  • From: kernel test robot <lkp@xxxxxxxxx>
• Re: [RFC][PATCH] freezer,sched: Rewrite core freezer logic
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• [RFC][PATCH] freezer,sched: Rewrite core freezer logic
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• [PATCH v3 4/4] powerpc/64s: enable MMU_LAZY_TLB_SHOOTDOWN
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• [PATCH v3 3/4] lazy tlb: shoot lazies, a non-refcounting lazy tlb option
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• [PATCH v3 2/4] lazy tlb: allow lazy tlb mm switching to be configurable
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• [PATCH v3 1/4] lazy tlb: introduce lazy mm refcount helper functions
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• [PATCH v3 0/4] shoot lazy tlbs
  • From: Nicholas Piggin <npiggin@xxxxxxxxx>
• [asm-generic:clkdev 4/7] arch/m68k/coldfire/m527x.c:89:2: error: implicit declaration of function 'wm527x_clk_lookupritew'
  • From: kernel test robot <lkp@xxxxxxxxx>
• [asm-generic:clkdev 4/5] drivers/clk/clk.c:723:6: error: redefinition of 'clk_rate_exclusive_put'
  • From: kernel test robot <lkp@xxxxxxxxx>
• [asm-generic:clkdev 1/5] arch/mips/ar7/clock.c:428:28: error: array type has incomplete element type 'struct clkdev_table'
  • From: kernel test robot <lkp@xxxxxxxxx>
• Re: [PATCH V2 2/2] microblaze: Cleanup unused functions
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH V2 2/2] microblaze: Cleanup unused functions
  • From: Michal Simek <monstr@xxxxxxxxx>
• Re: [PATCH] microblaze: Remove unused functions
  • From: Michal Simek <monstr@xxxxxxxxx>
• Re: [PATCH V5 2/3] riscv: Add ASID-based tlbflushing methods
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH V4 2/2] riscv: Use use_asid_allocator flush TLB
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [PATCH V5 2/3] riscv: Add ASID-based tlbflushing methods
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [RFC PATCH V3 03/11] x86/Hyper-V: Add new hvcall guest address host visibility support
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• Re: [RFC PATCH V3 03/11] x86/Hyper-V: Add new hvcall guest address host visibility support
  • From: Borislav Petkov <bp@xxxxxxxxx>
• [PATCH V5 3/3] riscv: tlbflush: Optimize coding convention
  • From: guoren@xxxxxxxxxx
• [PATCH V5 2/3] riscv: Add ASID-based tlbflushing methods
  • From: guoren@xxxxxxxxxx
• [PATCH V5 1/3] riscv: Use global mappings for kernel pages
  • From: guoren@xxxxxxxxxx
• [PATCH V5 0/3] riscv: Fixup asid_allocator remaining issues
  • From: guoren@xxxxxxxxxx
• [RFC PATCH V3 11/11] HV/Storvsc: Add Isolation VM support for storvsc driver
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• [RFC PATCH V3 10/11] HV/Netvsc: Add Isolation VM support for netvsc driver
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• [RFC PATCH V3 09/11] HV/IOMMU: Enable swiotlb bounce buffer for Isolation VM
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• [RFC PATCH V3 08/11] swiotlb: Add bounce buffer remap address setting function
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• [RFC PATCH V3 07/11] HV/Vmbus: Initialize VMbus ring buffer for Isolation VM
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• [RFC PATCH V3 06/11] HV/Vmbus: Add SNP support for VMbus channel initiate message
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• [RFC PATCH V3 05/11] HV: Add ghcb hvcall support for SNP VM
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• [RFC PATCH V3 03/11] x86/Hyper-V: Add new hvcall guest address host visibility support
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• [RFC PATCH V3 04/11] HV: Add Write/Read MSR registers via ghcb
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• [RFC PATCH V3 02/11] x86/HV: Initialize shared memory boundary in the Isolation VM.
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• [RFC PATCH V3 01/11] x86/HV: Initialize GHCB page in Isolation VM
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• [RFC PATCH V3 00/11] x86/Hyper-V: Add Hyper-V Isolation VM support
  • From: Tianyu Lan <ltykernel@xxxxxxxxx>
• Re: [PATCH V4 1/2] riscv: Fixup _PAGE_GLOBAL in _PAGE_KERNEL
  • From: Guo Ren <guoren@xxxxxxxxxx>
• [PATCH V2 2/2] microblaze: Cleanup unused functions
  • From: guoren@xxxxxxxxxx
• [PATCH V2 1/2] riscv: Cleanup unused functions
  • From: guoren@xxxxxxxxxx
• [PATCH V2 0/2] arch: Cleanup unused functions
  • From: guoren@xxxxxxxxxx
• Re: [PATCH V4 2/2] riscv: Use use_asid_allocator flush TLB
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH V4 2/2] riscv: Use use_asid_allocator flush TLB
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH] arch: Cleanup unused functions
  • From: Palmer Dabbelt <palmerdabbelt@xxxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Palmer Dabbelt <palmerdabbelt@xxxxxxxxxx>
• Re: [PATCH] arch: Cleanup unused functions
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH V4 2/2] riscv: Use use_asid_allocator flush TLB
  • From: palmerdabbelt@xxxxxxxxxx
• Re: [PATCH V4 1/2] riscv: Fixup _PAGE_GLOBAL in _PAGE_KERNEL
  • From: palmerdabbelt@xxxxxxxxxx
• Re: [PATCH] arch: Cleanup unused functions
  • From: Palmer Dabbelt <palmerdabbelt@xxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: James Bottomley <James.Bottomley@xxxxxxxxxxxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: James Bottomley <James.Bottomley@xxxxxxxxxxxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Toke Høiland-Jørgensen <toke@xxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: James Bottomley <James.Bottomley@xxxxxxxxxxxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Matthew Wilcox <willy@xxxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: James Bottomley <James.Bottomley@xxxxxxxxxxxxxxxxxxxxx>
• Re: [PATCH v7 16/22] sched: Defer wakeup in ttwu() for unschedulable frozen tasks
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH v7 16/22] sched: Defer wakeup in ttwu() for unschedulable frozen tasks
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH v7 16/22] sched: Defer wakeup in ttwu() for unschedulable frozen tasks
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH v7 16/22] sched: Defer wakeup in ttwu() for unschedulable frozen tasks
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v7 16/22] sched: Defer wakeup in ttwu() for unschedulable frozen tasks
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v7 16/22] sched: Defer wakeup in ttwu() for unschedulable frozen tasks
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH v7 16/22] sched: Defer wakeup in ttwu() for unschedulable frozen tasks
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Greg KH <greg@xxxxxxxxx>
• Re: Maintainers / Kernel Summit 2021 planning kick-off
  • From: Christoph Lameter <cl@xxxxxxxxx>
• Re: [PATCH v7 13/22] sched: Allow task CPU affinity to be restricted on asymmetric systems
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH V4 2/2] riscv: Use use_asid_allocator flush TLB
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [PATCH v7 10/22] sched: Reject CPU affinity changes based on task_cpu_possible_mask()
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH] all: remove GENERIC_FIND_FIRST_BIT
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v7 10/22] sched: Reject CPU affinity changes based on task_cpu_possible_mask()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH v7 01/22] sched: Favour predetermined active CPU as migration destination
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• Re: [PATCH v7 13/22] sched: Allow task CPU affinity to be restricted on asymmetric systems
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v7 13/22] sched: Allow task CPU affinity to be restricted on asymmetric systems
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v7 13/22] sched: Allow task CPU affinity to be restricted on asymmetric systems
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH v7 13/22] sched: Allow task CPU affinity to be restricted on asymmetric systems
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH v7 10/22] sched: Reject CPU affinity changes based on task_cpu_possible_mask()
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v7 08/22] cpuset: Don't use the cpu_possible_mask as a last resort for cgroup v1
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v7 01/22] sched: Favour predetermined active CPU as migration destination
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v7 22/22] Documentation: arm64: describe asymmetric 32-bit support
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v7 10/22] sched: Reject CPU affinity changes based on task_cpu_possible_mask()
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH v7 08/22] cpuset: Don't use the cpu_possible_mask as a last resort for cgroup v1
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH 1/1] mm/debug_vm_pgtable: fix alignment for pmd/pud_advanced_tests()
  • From: Anatoly Pugachev <matorola@xxxxxxxxx>
• Re: [PATCH v7 01/22] sched: Favour predetermined active CPU as migration destination
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• Re: [PATCH 1/1] mm/debug_vm_pgtable: fix alignment for pmd/pud_advanced_tests()
  • From: Anshuman Khandual <anshuman.khandual@xxxxxxx>
• Re: [PATCH v7 01/22] sched: Favour predetermined active CPU as migration destination
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH 1/1] mm/debug_vm_pgtable: fix alignment for pmd/pud_advanced_tests()
  • From: Anatoly Pugachev <matorola@xxxxxxxxx>
• Re: [PATCH v7 01/22] sched: Favour predetermined active CPU as migration destination
  • From: Valentin Schneider <valentin.schneider@xxxxxxx>
• [PATCH V4 2/2] riscv: Use use_asid_allocator flush TLB
  • From: guoren@xxxxxxxxxx
• [PATCH V4 1/2] riscv: Fixup _PAGE_GLOBAL in _PAGE_KERNEL
  • From: guoren@xxxxxxxxxx
• [PATCH V4 0/2] riscv: Fixup asid_allocator remaining issues
  • From: guoren@xxxxxxxxxx
• Re: [PATCH V3 2/2] riscv: Use use_asid_allocator flush TLB
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [PATCH 1/1] mm/debug_vm_pgtable: fix alignment for pmd/pud_advanced_tests()
  • From: Anshuman Khandual <anshuman.khandual@xxxxxxx>
• Re: [PATCH 0/1] mm/debug_vm_pgtable: fix alignment for pmd/pud_advanced_tests()
  • From: Anshuman Khandual <anshuman.khandual@xxxxxxx>
• Re: [PATCH V3 2/2] riscv: Use use_asid_allocator flush TLB
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH] arch: Cleanup unused functions
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH v7 22/22] Documentation: arm64: describe asymmetric 32-bit support
  • From: Marc Zyngier <maz@xxxxxxxxxx>
• Re: [PATCH v7 22/22] Documentation: arm64: describe asymmetric 32-bit support
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v7 22/22] Documentation: arm64: describe asymmetric 32-bit support
  • From: Marc Zyngier <maz@xxxxxxxxxx>
• [PATCH v7 22/22] Documentation: arm64: describe asymmetric 32-bit support
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 21/22] arm64: Remove logic to kill 32-bit tasks on 64-bit-only cores
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 20/22] arm64: Hook up cmdline parameter to allow mismatched 32-bit EL0
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 19/22] arm64: Prevent offlining first CPU with 32-bit EL0 on mismatched system
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 18/22] arm64: exec: Adjust affinity for compat tasks with mismatched 32-bit EL0
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 17/22] arm64: Implement task_cpu_possible_mask()
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 16/22] sched: Defer wakeup in ttwu() for unschedulable frozen tasks
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 15/22] freezer: Add frozen_or_skipped() helper function
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 14/22] sched: Introduce task_cpus_dl_admissible() to check proposed affinity
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 13/22] sched: Allow task CPU affinity to be restricted on asymmetric systems
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 12/22] sched: Split the guts of sched_setaffinity() into a helper function
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 11/22] sched: Introduce task_struct::user_cpus_ptr to track requested affinity
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 10/22] sched: Reject CPU affinity changes based on task_cpu_possible_mask()
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 09/22] cpuset: Honour task_cpu_possible_mask() in guarantee_online_cpus()
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 08/22] cpuset: Don't use the cpu_possible_mask as a last resort for cgroup v1
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 07/22] sched: Introduce task_cpu_possible_mask() to limit fallback rq selection
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 06/22] arm64: Advertise CPUs capable of running 32-bit applications in sysfs
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 05/22] arm64: Kill 32-bit applications scheduled on 64-bit-only CPUs
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 04/22] KVM: arm64: Kill 32-bit vCPUs on systems with mismatched EL0 support
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 03/22] arm64: Allow mismatched 32-bit EL0 support
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 02/22] arm64: cpuinfo: Split AArch32 registers out into a separate struct
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 01/22] sched: Favour predetermined active CPU as migration destination
  • From: Will Deacon <will@xxxxxxxxxx>
• [PATCH v7 00/22] Add support for 32-bit tasks on asymmetric AArch32 systems
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v27 24/31] x86/cet/shstk: Handle thread shadow stack
  • From: "Yu, Yu-cheng" <yu-cheng.yu@xxxxxxxxx>
• Re: [PATCH v27 30/31] mm: Update arch_validate_flags() to test vma anonymous
  • From: "Yu, Yu-cheng" <yu-cheng.yu@xxxxxxxxx>
• Re: [PATCH v2] LOCKDEP: reduce LOCKDEP dependency list
  • From: Waiman Long <llong@xxxxxxxxxx>
• [PATCH 1/1] mm/debug_vm_pgtable: fix alignment for pmd/pud_advanced_tests()
  • From: Gerald Schaefer <gerald.schaefer@xxxxxxxxxxxxx>
• [PATCH 0/1] mm/debug_vm_pgtable: fix alignment for pmd/pud_advanced_tests()
  • From: Gerald Schaefer <gerald.schaefer@xxxxxxxxxxxxx>
• Re: [PATCH V3 2/2] riscv: Use use_asid_allocator flush TLB
  • From: Christoph Hellwig <hch@xxxxxx>
• Re: [PATCH] arch: Cleanup unused functions
  • From: Anup Patel <anup@xxxxxxxxxxxxxx>
• Re: [PATCH V3 1/2] riscv: Fixup _PAGE_GLOBAL in _PAGE_KERNEL
  • From: Christoph Hellwig <hch@xxxxxx>
• [PATCH V3 2/2] riscv: Use use_asid_allocator flush TLB
  • From: guoren@xxxxxxxxxx
• [PATCH V3 1/2] riscv: Fixup _PAGE_GLOBAL in _PAGE_KERNEL
  • From: guoren@xxxxxxxxxx
• [PATCH V3 0/2] riscv: Fixup asid_allocator remaining issues
  • From: guoren@xxxxxxxxxx
• Re: [PATCH] arch: Cleanup unused functions
  • From: Christoph Hellwig <hch@xxxxxx>
• [PATCH] arch: Cleanup unused functions
  • From: guoren@xxxxxxxxxx
• Re: [PATCH v27 30/31] mm: Update arch_validate_flags() to test vma anonymous
  • From: Catalin Marinas <catalin.marinas@xxxxxxx>
• Re: [PATCH v27 27/31] ELF: Introduce arch_setup_elf_property()
  • From: Catalin Marinas <catalin.marinas@xxxxxxx>
• Re: [PATCH v6 18/21] arm64: Prevent offlining first CPU with 32-bit EL0 on mismatched system
  • From: Catalin Marinas <catalin.marinas@xxxxxxx>
• Re: [PATCH 2/3] riscv: Fixup PAGE_UP in asm/page.h
  • From: Christoph Hellwig <hch@xxxxxxxxxxxxx>
• Re: [PATCH 2/3] riscv: Fixup PAGE_UP in asm/page.h
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH v2] LOCKDEP: reduce LOCKDEP dependency list
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH v2] LOCKDEP: reduce LOCKDEP dependency list
  • From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
• Re: [PATCH 2/3] riscv: Fixup PAGE_UP in asm/page.h
  • From: Christoph Hellwig <hch@xxxxxxxxxxxxx>
• Re: [PATCH v2] LOCKDEP: reduce LOCKDEP dependency list
  • From: Julian Braha <julianbraha@xxxxxxxxx>
• [PATCH V2 2/2] riscv: Use use_asid_allocator flush TLB
  • From: guoren@xxxxxxxxxx
• [PATCH V2 1/2] riscv: Fixup _PAGE_GLOBAL in _PAGE_KERNEL
  • From: guoren@xxxxxxxxxx
• [PATCH V2 0/2] riscv: Fixup asid_allocator remaining issues
  • From: guoren@xxxxxxxxxx
• [PATCH v2] LOCKDEP: reduce LOCKDEP dependency list
  • From: Randy Dunlap <rdunlap@xxxxxxxxxxxxx>
• Re: [PATCH v6 00/21] Add support for 32-bit tasks on asymmetric AArch32 systems
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v6 21/21] Documentation: arm64: describe asymmetric 32-bit support
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v6 12/21] sched: Allow task CPU affinity to be restricted on asymmetric systems
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v6 11/21] sched: Split the guts of sched_setaffinity() into a helper function
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v6 08/21] cpuset: Honour task_cpu_possible_mask() in guarantee_online_cpus()
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v6 13/21] sched: Admit forcefully-affined tasks into SCHED_DEADLINE
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v6 18/21] arm64: Prevent offlining first CPU with 32-bit EL0 on mismatched system
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v6 02/21] arm64: Allow mismatched 32-bit EL0 support
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v6 07/21] cpuset: Don't use the cpu_possible_mask as a last resort for cgroup v1
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v27 10/10] x86/vdso: Add ENDBR to __vdso_sgx_enter_enclave
  • From: "Yu, Yu-cheng" <yu-cheng.yu@xxxxxxxxx>
• Re: [PATCH v24 9/9] x86/vdso: Add ENDBR to __vdso_sgx_enter_enclave
  • From: "Yu, Yu-cheng" <yu-cheng.yu@xxxxxxxxx>
• Re: [PATCH v24 9/9] x86/vdso: Add ENDBR to __vdso_sgx_enter_enclave
  • From: Sean Christopherson <seanjc@xxxxxxxxxx>
• Re: [PATCH v6 21/21] Documentation: arm64: describe asymmetric 32-bit support
  • From: Catalin Marinas <catalin.marinas@xxxxxxx>
• Re: [PATCH v6 20/21] arm64: Remove logic to kill 32-bit tasks on 64-bit-only cores
  • From: Catalin Marinas <catalin.marinas@xxxxxxx>
• Re: [PATCH v6 19/21] arm64: Hook up cmdline parameter to allow mismatched 32-bit EL0
  • From: Catalin Marinas <catalin.marinas@xxxxxxx>
• Re: [PATCH v6 18/21] arm64: Prevent offlining first CPU with 32-bit EL0 on mismatched system
  • From: Catalin Marinas <catalin.marinas@xxxxxxx>
• Re: [PATCH v6 16/21] arm64: Implement task_cpu_possible_mask()
  • From: Catalin Marinas <catalin.marinas@xxxxxxx>
• Re: [PATCH v6 17/21] arm64: exec: Adjust affinity for compat tasks with mismatched 32-bit EL0
  • From: Catalin Marinas <catalin.marinas@xxxxxxx>
• Re: [PATCH v6 02/21] arm64: Allow mismatched 32-bit EL0 support
  • From: Catalin Marinas <catalin.marinas@xxxxxxx>
• Re: [PATCH v6 02/21] arm64: Allow mismatched 32-bit EL0 support
  • From: Catalin Marinas <catalin.marinas@xxxxxxx>
• Re: [PATCH v6 06/21] sched: Introduce task_cpu_possible_mask() to limit fallback rq selection
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v6 02/21] arm64: Allow mismatched 32-bit EL0 support
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH v6 02/21] arm64: Allow mismatched 32-bit EL0 support
  • From: Will Deacon <will@xxxxxxxxxx>
• Re: [PATCH 1/3] riscv: Fixup _PAGE_GLOBAL in _PAGE_KERNEL
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH 1/3] riscv: Fixup _PAGE_GLOBAL in _PAGE_KERNEL
  • From: Anup Patel <anup@xxxxxxxxxxxxxx>
• Re: [PATCH 1/3] riscv: Fixup _PAGE_GLOBAL in _PAGE_KERNEL
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH 3/3] riscv: Use use_asid_allocator flush TLB
  • From: Anup Patel <anup@xxxxxxxxxxxxxx>
• Re: [PATCH 1/3] riscv: Fixup _PAGE_GLOBAL in _PAGE_KERNEL
  • From: Anup Patel <anup@xxxxxxxxxxxxxx>
• [PATCH 3/3] riscv: Use use_asid_allocator flush TLB
  • From: guoren@xxxxxxxxxx
• [PATCH 2/3] riscv: Fixup PAGE_UP in asm/page.h
  • From: guoren@xxxxxxxxxx
• [PATCH 1/3] riscv: Fixup _PAGE_GLOBAL in _PAGE_KERNEL
  • From: guoren@xxxxxxxxxx
• [PATCH] fix typo of documentation.
  • From: hitzhangjie <hit.zhangjie@xxxxxxxxx>
• Re: [PATCH V2 RESEND] mm: Define default value for FIRST_USER_ADDRESS
  • From: Palmer Dabbelt <palmer@xxxxxxxxxxx>
• [asm-generic:master] BUILD SUCCESS 14462376858e35b83932f94616effc2f49fd8494
  • From: kernel test robot <lkp@xxxxxxxxx>
• Re: [PATCH v27 24/31] x86/cet/shstk: Handle thread shadow stack
  • From: Andy Lutomirski <luto@xxxxxxxxxx>
• Re: [PATCH v27 10/10] x86/vdso: Add ENDBR to __vdso_sgx_enter_enclave
  • From: Jarkko Sakkinen <jarkko@xxxxxxxxxx>
• [PATCH] microblaze: Remove unused functions
  • From: guoren@xxxxxxxxxx
• Re: [PATCH v27 13/31] mm: Move VM_UFFD_MINOR_BIT from 37 to 38
  • From: "Yu, Yu-cheng" <yu-cheng.yu@xxxxxxxxx>
• Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support
  • From: Guo Ren <guoren@xxxxxxxxxx>
• Re: [PATCH v27 13/31] mm: Move VM_UFFD_MINOR_BIT from 37 to 38
  • From: Axel Rasmussen <axelrasmussen@xxxxxxxxxx>
• [PATCH v27 10/10] x86/vdso: Add ENDBR to __vdso_sgx_enter_enclave
  • From: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx>
• [PATCH v27 09/10] x86/vdso/32: Add ENDBR to __kernel_vsyscall entry point
  • From: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx>
• [PATCH v27 08/10] x86/vdso: Introduce ENDBR macro
  • From: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx>
• [PATCH v27 07/10] x86/vdso: Insert endbr32/endbr64 to vDSO
  • From: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx>
• [PATCH v27 06/10] x86/cet/ibt: Update arch_prctl functions for Indirect Branch Tracking
  • From: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx>
• [PATCH v27 05/10] x86/cet/ibt: Update ELF header parsing for Indirect Branch Tracking
  • From: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx>
• [PATCH v27 04/10] x86/cet/ibt: Disable IBT for ia32
  • From: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx>
• [PATCH v27 03/10] x86/cet/ibt: Handle signals for Indirect Branch Tracking
  • From: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx>
• [PATCH v27 02/10] x86/cet/ibt: Add user-mode Indirect Branch Tracking support
  • From: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx>
• [PATCH v27 01/10] x86/cet/ibt: Add Kconfig option for Indirect Branch Tracking
  • From: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx>
• [PATCH v27 00/10] Control-flow Enforcement: Indirect Branch Tracking
  • From: Yu-cheng Yu <yu-cheng.yu@xxxxxxxxx>