Eric,
On 16/07/21 1:29 am, Eric W. Biederman wrote:
I have been digging into this some more and I have found one place
that I am having a challenge dealing with.
In arch/m68k/fpsp040/skeleton.S there is an assembly version of
copy_from_user that calls fpsp040_die when the bytes can not be read.
Now fpsp040_die is just:
/*
* This function is called if an error occur while accessing
* user-space from the fpsp040 code.
*/
asmlinkage void fpsp040_die(void)
{
do_exit(SIGSEGV);
}
In other places (bus error handlers) we have
force_sig(SIGSEGV);
or
force_sig_fault(sig, si_code, addr);
(the latter for floating point traps from FPU hardware). Would that be
any better?
The problem here is the instruction emulation performed in the fpsp040
code performs a very minimal saving of registers. I don't think even
the normal system call entry point registers that are saved are present
at that point.
Is there any chance you can help me figure out how to get a stack frame
with all of the registers present before fpsp040_die is called?
I suppose adding the following code (untested) to entry.S:
ENTRY(fpsp040_die)
SAVE_ALL_INT
jbsr fpsp040_die_c
jra ret_from_exception
along with renaming above C entry point to fpsp040_die_c would add the
basic saved registers, but these would not necessarily reflect the state
of the processor when the fpsp040 trap was called. Is that what you're
after?
To add the rest of the switch stack (again, won't reflect state before
entering fpsp040), try:
ENTRY(fpsp040_die)
SAVE_ALL_INT
SAVE_SWITCH_STACK
jbsr fpsp040_die_c
addql #24,%sp_c
jra ret_from_exception
If you need the registers saved at fpsp040 entry, the only way I can see
is to change the code in arch/m68k/kernel/vectors.c to use a common fpsp
trap entry point that saves state, before jumping to the desired fpsp040
entry point using a FPU trap table. Just like we do for system calls.
Cheers,
Michael
Eric