Re: isp1760-hcd.c driver BUG_ON(!skip_map)

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On Tue, 2009-02-24 at 00:17 +0100, Sebastian Andrzej Siewior wrote:
> * Catalin Marinas | 2009-02-17 13:33:53 [+0000]:
> 
> >In the ISP1761 manual, there are some timing diagrams for register
> >access. If I understand them correctly (as a software person), there is
> >something like minimum 86ns between the end of the write pulse to the
> >beginning of the read one.
[...]
> I would like to NAK this but I don't have a better idea for a proper
> fix.
> 
> According to section 14.1.3, table 95 write - read delay is 195ns for
> EHCI op regs and the SKIPMAP register is one of those see table 8 in
> section 8. So the required delay should be 195ns. 

My datasheet for ISP1760 doesn't have a table 95 in section 14.1.3 (but
in the next section). However the ISP1761 data sheet has a section
15.1.1.3 mentioning the 195ns delay for the EHCI registers.

> So after long thinking I'm fine with this patch. Please update your
> comment and add _why_ this delay is required. 

That's an updated patch:


Add a delay before reading the SKIPMAP registers in isp1760-hcd.c

From: Catalin Marinas <catalin.marinas@xxxxxxx>

The data read from the SKIPMAP registers is not immediately available
after writing and the driver panics when a packet is enqueued from the
interrupt handler. This patch adds an ndelay(195) before these registers
are read (delay value mentioned in section 15.1.1.3 of the ISP1760 data
sheet).

Signed-off-by: Catalin Marinas <catalin.marinas@xxxxxxx>
---
 drivers/usb/host/isp1760-hcd.c |   14 ++++++++++++++
 1 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/host/isp1760-hcd.c b/drivers/usb/host/isp1760-hcd.c
index 8ee2f41..8d57182 100644
--- a/drivers/usb/host/isp1760-hcd.c
+++ b/drivers/usb/host/isp1760-hcd.c
@@ -819,6 +819,13 @@ static void enqueue_an_ATL_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
 	u32 atl_regs, payload;
 	u32 buffstatus;
 
+	/*
+	 * When this function is called from the interrupt handler to enqueue
+	 * a follow-up packet, the SKIP register gets written and read back
+	 * almost immediately. With ISP1761, this register requires a delay of
+	 * 195ns between a write and subsequent read (see section 15.1.1.3).
+	 */
+	ndelay(195);
 	skip_map = isp1760_readl(hcd->regs + HC_ATL_PTD_SKIPMAP_REG);
 
 	BUG_ON(!skip_map);
@@ -853,6 +860,13 @@ static void enqueue_an_INT_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
 	u32 int_regs, payload;
 	u32 buffstatus;
 
+	/*
+	 * When this function is called from the interrupt handler to enqueue
+	 * a follow-up packet, the SKIP register gets written and read back
+	 * almost immediately. With ISP1761, this register requires a delay of
+	 * 195ns between a write and subsequent read (see section 15.1.1.3).
+	 */
+	ndelay(195);
 	skip_map = isp1760_readl(hcd->regs + HC_INT_PTD_SKIPMAP_REG);
 
 	BUG_ON(!skip_map);


Thanks.

-- 
Catalin

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