On 29/06/17 16:18, Andrew Haley wrote: > Well, yeah. We can only really blame ARM for this: they provided a > double-word CAS but no way to define a double-word atomic load which > does not also store. I hesitate to place blame on the ARM architects, > a splendid and diligent bunch, but there it is. I have no idea why > LDXP doesn't work as an atomic load, but it does not. Actually, I have a bone to pick with them - the instruction to find out the ERG size is privileged. As such, unless you know better, you have to assume the worst case of 2048 bytes. This makes lock-free data structure state and element structs huge. It would be enough of a pain to have to make alignment run-time, but you could do it if you could get ERG size - *but you can't even get ERG size*. Ahhh, face palm, etc.
