On 27/06/17 22:58, Toebs Douglass wrote: > On 27/06/17 23:53, Richard Earnshaw wrote: >> This is correct. AArch64 cannot do the 16-byte atomic compare and swap >> and needs lock operations. > > I may be completely wrong, but I think it can. > > ARM (32-bit) supported double-word LL/SC from arm6k and armv8 I think > had it from day one. CAS is mapped onto LL/SC. > > I've written asm to do this, the key is the ldxp and stxp instruction, > and it seems to work. > > Only *seems* to work. The ldxp operation is *NOT* atomic and atomicity is only guaranteed if a store back of the original read value completes. In general this makes ldxp not useful for atomic operations since we cannot guarantee that the location is writable. R.
