Re: __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 not defined on aarch64

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On 29/06/17 09:57, Toebs Douglass wrote:
> There are as far as I can tell in the entire disassembly (and certainly
> not in the function call above) any use of the "X" type load/store
> instructions, which are the type for load-linked/store-conditional.

This is what's in libatomic:

0000000000003048 <__atomic_compare_exchange_16>:
    3048:       a9bc7bfd        stp     x29, x30, [sp,#-64]!
    304c:       910003fd        mov     x29, sp
    3050:       a90153f3        stp     x19, x20, [sp,#16]
    3054:       aa0003f4        mov     x20, x0
    3058:       aa0103f3        mov     x19, x1
    305c:       a9025bf5        stp     x21, x22, [sp,#32]
    3060:       f9001bf7        str     x23, [sp,#48]
    3064:       aa0203f6        mov     x22, x2
    3068:       aa0303f7        mov     x23, x3
    306c:       97fffd97        bl      26c8 <libat_lock_1>
    3070:       a9401263        ldp     x3, x4, [x19]
    3074:       a9400a81        ldp     x1, x2, [x20]
    3078:       ca010060        eor     x0, x3, x1
    307c:       ca020085        eor     x5, x4, x2
    3080:       aa050000        orr     x0, x0, x5
    3084:       f100001f        cmp     x0, #0x0
    3088:       1a9f17f5        cset    w21, eq
    308c:       eb01007f        cmp     x3, x1
    3090:       54000140        b.eq    30b8 <__atomic_compare_exchange_16+0x70>
    3094:       a9000a61        stp     x1, x2, [x19]
    3098:       aa1403e0        mov     x0, x20
    309c:       97fffd91        bl      26e0 <libat_unlock_1>
    30a0:       f9401bf7        ldr     x23, [sp,#48]
    30a4:       2a1503e0        mov     w0, w21
    30a8:       a94153f3        ldp     x19, x20, [sp,#16]
    30ac:       a9425bf5        ldp     x21, x22, [sp,#32]
    30b0:       a8c47bfd        ldp     x29, x30, [sp],#64
    30b4:       d65f03c0        ret
    30b8:       eb02009f        cmp     x4, x2
    30bc:       54fffec1        b.ne    3094 <__atomic_compare_exchange_16+0x4c>
    30c0:       a9005e96        stp     x22, x23, [x20]
    30c4:       aa1403e0        mov     x0, x20
    30c8:       97fffd86        bl      26e0 <libat_unlock_1>
    30cc:       f9401bf7        ldr     x23, [sp,#48]
    30d0:       2a1503e0        mov     w0, w21
    30d4:       a94153f3        ldp     x19, x20, [sp,#16]
    30d8:       a9425bf5        ldp     x21, x22, [sp,#32]
    30dc:       a8c47bfd        ldp     x29, x30, [sp],#64
    30e0:       d65f03c0        ret

I think I now properly understand Richard Earnshaw's point: that we
*do* support a full set of atomic primitives for 16-byte types via
libatomic, but for them to work as a sequentially-consistent set we
must use the same locking scheme for all of them.  It's ugly, and
horrible for anyone who simply wants a double-word CAS, but it is what
it is.  We can't use LDXP because it isn't atomic on its own, and the
ARM manual is quite explicit about this.  Anyone who wants to use
a real compare-and-swap-16 is on their own.

-- 
Andrew Haley
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
EAC8 43EB D3EF DB98 CC77 2FAD A5CD 6035 332F A671



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