Re: [PATCH] MIPS: Octeon: Expose support for mips32r1, mips32r2 and mips64r1

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On Mon, 22 May 2017, David Daney wrote:

> >   I suspect it will affect more than just `show_cpuinfo', e.g. some inline
> > asm, and you could have included a justification as to why this patch is
> > correct, such as by referring to how `set_isa' sets flags in `isa_level'.
> 
> That is correct, and exactly what I said in my reply to the patch when it was
> posted.  When the OCTEON code was merged, different code paths were taken in
> the kernel, and there was a deliberate decision to structure
> mach-cavium-octeon/cpu-feature-overrides.h the way we did it.
> 
> I also noted that the information exposed to userspace via /proc/cpuinfo
> should be represented in the kernel by a distinct mechanism from how the
> kernel makes internal decisions about CPU features.

 Explicit checks for Octeon should then be used instead in the individual 
pieces of code affected, e.g.:

	if (cpu_has_mips32r1 && !cpu_mach_octeon)

or suchlike, possibly with an explanatory comment as to why such an 
exclusion has been made.  The `cpu_has_mips32r1', etc. macros are supposed 
to be generic architectural checks.

 Also any design decisions should have been noted in the description of 
the original commit.

  Maciej




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