On 05/20/2017 06:37 PM, Maciej W. Rozycki wrote:
On Mon, 15 May 2017, Petar Jovanovic wrote:
Define Cavium Octeon as a CPU that has support for mips32r1, mips32r2 and
mips64r1. This will affect show_cpuinfo() that will now correctly expose
mips32r1, mips32r2 and mips64r1 as supported ISAs.
I suspect it will affect more than just `show_cpuinfo', e.g. some inline
asm, and you could have included a justification as to why this patch is
correct, such as by referring to how `set_isa' sets flags in `isa_level'.
That is correct, and exactly what I said in my reply to the patch when
it was posted. When the OCTEON code was merged, different code paths
were taken in the kernel, and there was a deliberate decision to
structure mach-cavium-octeon/cpu-feature-overrides.h the way we did it.
I also noted that the information exposed to userspace via /proc/cpuinfo
should be represented in the kernel by a distinct mechanism from how the
kernel makes internal decisions about CPU features.
Anyway it LGTM, so:
Reviewed-by: Maciej W. Rozycki <macro@xxxxxxxxxx>
Such problems pop up from time to time, so overall we probably want to
have a consistency check with a BUG_ON or suchlike implemented somewhere,
preferably once the console is running so that the kernel does not just
silently hang without output, iterating over these macros and verifying
against actual CPU info.
HTH,
Maciej
