On Mon, 15 May 2017, Petar Jovanovic wrote: > Define Cavium Octeon as a CPU that has support for mips32r1, mips32r2 and > mips64r1. This will affect show_cpuinfo() that will now correctly expose > mips32r1, mips32r2 and mips64r1 as supported ISAs. I suspect it will affect more than just `show_cpuinfo', e.g. some inline asm, and you could have included a justification as to why this patch is correct, such as by referring to how `set_isa' sets flags in `isa_level'. Anyway it LGTM, so: Reviewed-by: Maciej W. Rozycki <macro@xxxxxxxxxx> Such problems pop up from time to time, so overall we probably want to have a consistency check with a BUG_ON or suchlike implemented somewhere, preferably once the console is running so that the kernel does not just silently hang without output, iterating over these macros and verifying against actual CPU info. HTH, Maciej
