Re: kernel 4.12-rc1 does not boot with CONFIG_MIPS_MT_SMP enabled on lantiq xway xrx200

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On 05/18/2017 10:19 AM, Matt Redfearn wrote:
> Hi Hauke,
> 
> I would guess something to do with the conversion of the CPU interrupt
> controller to IPI domains by patchset
> https://patchwork.linux-mips.org/project/linux-mips/list/?series=255&state=*,
> new in 4.12, has broken your IPIs and a CPU is getting stuck waiting for
> the other to respond.
> 
> Note that Paul says the Lantiq part of patch
> https://patchwork.linux-mips.org/patch/15837/
> (1eed40043579608e16509c43eeeb3a53a8a42378) has only been compile tested.
> 
> Thanks,
> 
> Matt
> 
> 
> On 17/05/17 23:12, Hauke Mehrtens wrote:
>> Hi,
>>
>> I just tried to boot Linux 4.12-rc1 on a Lantiq Xway xrx200 board and
>> boot failed when I had CONFIG_MIPS_MT_SMP enabled.
>>
>> It works with SMP on 4.9 and I think I also tried 4.11-rcX, but I am not
>> 100% sure. I will investigate this problem further on Friday.
>>
>> If someone has an idea what I should test, I will do it on Friday.
>>
>> Both boot logs are attached to this mail.

Hi Matt and Paul,

you are correct, this commit breaks booting of Lantiq boards when SMP is
enabled on 4.12-rc1: https://patchwork.linux-mips.org/patch/15837/
When I revert this commit or when I add the boot option nosmp the system
boots again.

The problem is that the Lantiq IRQ controller gets registered first and
it directly handles the MIPS native SW1/2 and HW0 - HW5 IRQs. It looks
like this controller already registers IRQ 0 - 7 and the generic driver
only gets the following IRQs starting later.

root@LEDE:/# cat /proc/interrupts
           CPU0
  7:      26253      MIPS   7  timer
  8:          0      MIPS   0  IPI call
  9:          0      MIPS   1  IPI resched
 22:        130       icu  22  spi_rx
 23:         10       icu  23  spi_tx
 24:          0       icu  24  spi_err
112:        142       icu 112  asc_tx
113:         27       icu 113  asc_rx
114:          0       icu 114  asc_err
ERR:          0
root@LEDE:/#

I see two options to fix this problem.
1. Revert the removing of the SMP IRQ code from arch/mips/lantiq/irq.c
and make the generic code "register" IRQ 8 and 9 for SMP.
2. Make the Lantiq IRQ code use the generic MIPS IRQ code and only
handle the Lantiq IRQ controller ICU and not the MIPS IRQs.

Which option should I choose, or is there something else?


Hauke




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