RE: [PATCH] MIPS: Octeon: Expose support for mips32r1, mips32r2 and mips64r1

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Can anyone take a look at this? Thank you.

-----Original Message-----
From: Petar Jovanovic [mailto:Petar.Jovanovic@xxxxxxxxxx] 
Sent: Tuesday, April 25, 2017 7:25 PM
To: Petar Jovanovic <petar.jovanovic@xxxxxxxxx>; linux-mips@xxxxxxxxxxxxxx
Cc: ralf@xxxxxxxxxxxxxx; david.daney@xxxxxxxxxx
Subject: RE: [PATCH] MIPS: Octeon: Expose support for mips32r1, mips32r2 and
mips64r1

ping
________________________________________
From: Petar Jovanovic [petar.jovanovic@xxxxxxxxx]
Sent: Wednesday, April 05, 2017 6:01 PM
To: linux-mips@xxxxxxxxxxxxxx
Cc: ralf@xxxxxxxxxxxxxx; david.daney@xxxxxxxxxx; Petar Jovanovic
Subject: RE: [PATCH] MIPS: Octeon: Expose support for mips32r1, mips32r2 and
mips64r1

ping.

-----Original Message-----
From: Petar Jovanovic [mailto:petar.jovanovic@xxxxxxxxx]
Sent: Wednesday, March 15, 2017 6:59 PM
To: linux-mips@xxxxxxxxxxxxxx
Cc: ralf@xxxxxxxxxxxxxx; david.daney@xxxxxxxxxx; petar.jovanovic@xxxxxxxxxx;
Petar Jovanovic <petar.jovanovic@xxxxxxxxx>
Subject: [PATCH] MIPS: Octeon: Expose support for mips32r1, mips32r2 and
mips64r1

Define Cavium Octeon as a CPU that has support for mips32r1, mips32r2 and
mips64r1. This will affect show_cpuinfo() that will now correctly expose
mips32r1, mips32r2 and mips64r1 as supported ISAs.

Signed-off-by: Petar Jovanovic <petar.jovanovic@xxxxxxxxx>
---
 arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git
a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
index bd8b9bb..a4f7986 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
@@ -46,9 +46,9 @@
 #define cpu_has_64bits         1
 #define cpu_has_octeon_cache   1
 #define cpu_has_saa            octeon_has_saa()
-#define cpu_has_mips32r1       0
-#define cpu_has_mips32r2       0
-#define cpu_has_mips64r1       0
+#define cpu_has_mips32r1       1
+#define cpu_has_mips32r2       1
+#define cpu_has_mips64r1       1
 #define cpu_has_mips64r2       1
 #define cpu_has_dsp            0
 #define cpu_has_dsp2           0
--
1.9.1

=





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