Re: [PATCH 7/7] spi: bcm2835: Speed up FIFO access if fill level is known

[Lukas Wunner <lukas@xxxxxxxxx>]

On Tue, Nov 13, 2018 at 09:14:30PM -0800, Florian Fainelli wrote:
> On 11/13/2018 11:07 AM, Stefan Wahren wrote:
> >> Lukas Wunner <lukas@xxxxxxxxx> hat am 13. November 2018 um 09:07 geschrieben:
> >> On Sat, Nov 10, 2018 at 12:25:34PM +0100, Stefan Wahren wrote:
> >>>> On 08.11.2018, at 08:06, Lukas Wunner <lukas@xxxxxxxxx> wrote:
> >>>>> +#define BCM2835_SPI_FIFO_SIZE		64
> >>>>> +#define BCM2835_SPI_FIFO_SIZE_3_4	48
> >>>
> >>> I only have doubts about the naming FIFO_SIZE_3_4 because it describe
> >>> a fill level not a size.
> >>
> >> Hm, it's three quarters of the FIFO's size, so seems sufficiently apt?
> > 
> > Just a thought because only from the define name i wouldn't think of
> > three quarters first.
> > Since i don't have a better solution, please go on.
> 
> Does this have to be a constant, or could we just go about defining a
> macro which computes any percentage of that value (or quarter, which
> ever is most convienent), e.g:
> 
> #define BCM2835_SPI_FIFO_SIZE_PCT(pct)	\
> 	((BCM2835_SPI_FIFO_SIZE * (pct)) / 100)
> 
> That might be clearer and more future proof in case you want to
> implement a low watermark in the future?

The spi0 peripheral on the Raspberry Pi is fairly limited, the watermarks
in PIO mode are not configurable and the only status bits available are:

- RX FIFO full
- RX FIFO 3/4 full
- RX FIFO contains (at least) 1 byte
- TX FIFO empty
- TX FIFO has space for (at least) 1 byte

So I won't be able to implement a low watermark in the future and
BCM2835_SPI_FIFO_SIZE_3_4 represents the single fixed fill level
supported by the chip, hence a single macro seems sufficient.

(In an earlier version of the patch I used RXR in the macro name
but found 3/4 to be more explicit.)

Thanks,

Lukas