Hi Luc,
On 14 August 2017 at 00:28, Luc Van Oostenryck
<luc.vanoostenryck@xxxxxxxxx> wrote:
> On Mon, Aug 14, 2017 at 1:20 AM, Dibyendu Majumdar
> <mobile@xxxxxxxxxxxxxxx> wrote:
>>
>> I mean to say that I am interested in fixing the Sparse IR generation
>> - so if these are errors in the IR you spotted, then great
>
> Yes, I know.
> But I confess that doing this through sparse-llvm is kinda a pita for me :)
>
>> (I am
>> amazed at how quickly you found the errors!).
>
> Hey, I have now a small reproducer for one of the problem:
> char a, b;
> void c(void)
> {
> b = a & 1;
> }
>
> and we can solve it and put in the testsuite to avoid future regressions.
>
I am not really sure I understand. In dmrC I get following LLVM output
for above:
; ModuleID = 'out.bc'
source_filename = "dmrC"
@a = global i8 0, align 1
@b = global i8 0, align 1
; Function Attrs: argmemonly nounwind
declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i32, i1) #0
define void @c() {
L0:
%R1 = load i8, i8* @a
%R2 = sext i8 %R1 to i32
%R3 = and i32 %R2, 1
%R31 = trunc i32 %R3 to i8
store i8 %R31, i8* @b
ret void
}
attributes #0 = { argmemonly nounwind }
What do you get?
Regards
Dibyendu
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