On Tue, Feb 08, 2022 at 01:56:20PM +0000, Mark Brown wrote: > On Tue, Feb 08, 2022 at 01:50:36PM +0000, Charles Keepax wrote: > > The update_bits is really problematic as even in the write 0 to > > clear case, if a new interrupt asserts between the regmap_read > > and regmap_write that make up the update_bits, you will clear that > > new interrupt without ever noticing it. > > My understanding was that they'd mixed interrupt handling in as a > bitfield in another register. Eek.. what a courageous choice. I guess that might work as long as there is only a single IRQ status bit in the register, if there are multiple bits this really needs more complex handling, like you basically need the old behaviour for the IRQ part of the register, and the new behaviour for the not IRQ part of the register. So perhaps a new mask to denote which bit of the register is being used for IRQ stuff? Thanks, Charles
