Re: Sharing PCIe MMIO with other Drivers

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Unfortunately, I cannot change the IP on the FPGA to add more BARs either, the whole thing is locked down.

On Fri, Nov 9, 2018, at 4:48 PM, Sinan Kaya wrote:
> On 11/9/2018 4:43 PM, Andrei Danaila wrote:
> > Thanks Sinan,
> > 
> > I thought of that as well, unfortunately that it is not possible since the FPGA IP block is proprietary from a 3P vendor and lumps everything under one function with no option of adding additional functions.
> 
> How about adding multiple BARs and then give each BAR to a children driver?



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