On 11/9/2018 4:22 PM, Andrei Danaila wrote:
A couple of questions:
1. Is this the correct software flow for managing multiple devices exposed by a PCIe BAR0 address space?
If not, what is the correct flow?
If yes, any ideas on what may be going wrong?
General practice is to create a PCI Physical Function for each sub-functionality (I2C/UART/DMA etc.) so that individual drivers can claim their own PCI device and its own BAR space without sharing resources.
