Mark Lord wrote:
Michael Ellerman wrote:
On Tue, 2009-01-20 at 20:02 -0800, Grant Grundler wrote:
..
1) post lspci -v output to verify device (and bridges) is programmed
correctly.
2) look for chipset quirks that disable global msi
The kernel shouldn't let you enable MSI if that's the case, ie.
pci_enable_msi() should fail.
..
Exactly. So it shouldn't be that, then.
It might still be worth looking at the quirks though, in case there's
one for a previous revision of your bridge or something.
3) Make sure MMIO ranges for 0xfee00000 are routed to local APIC
ie each bridge needs to route that address somehow (negative decode
is common for upstream).
4) manually trigger the MSI by doing a MMIO write to the correct
0xfee00000 address with the assigned vector in order to see if your
interrupt handler gets called.
And can you plug something directly into the PCIe bus? If so does MSI
work on that?
..
Yup. PCIe cards have no problem with MSI in that box.
More later..
What kind of PCI-X bridge does that machine have? I know some AMD
HyperTransport to PCI-X bridges have broken MSI, but those should be
blacklisted already in the kernel..
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