Hi,
Here's an update of the 34xx mux patch.
Anand, can you please test it? This applies on top of the
previous two patches:
[PATCH 1/2] Add pin-mux support for OMAP3
[PATCH 1/2] ARM: OMAP: Allow registering pin mux function
I'll do one more clean-up patch on top of this today.
Tony
>From 9b08c2f31cfd3aa8288eca960739145f0ebbf2e1 Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony@xxxxxxxxxxx>
Date: Wed, 23 Jan 2008 11:16:20 -0800
Subject: [PATCH] ARM: OMAP2: Add pinmux support for OMAP3430
From: "Gadiyar, Anand" <gadiyar@xxxxxx>
This patch adds pinmux support for OMAP3.
Signed-off-by: Anand Gadiyar <gadiyar@xxxxxx>
Acked-by: Vikram Pandita <vikram.pandita@xxxxxx>
Signed-off-by: Tony Lindgren <tony@xxxxxxxxxxx>
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 0cd7316..64bcfb3 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -1,8 +1,9 @@
/*
* linux/arch/arm/mach-omap2/mux.c
*
- * OMAP1 pin multiplexing configurations
+ * OMAP2 and OMAP3 pin multiplexing configurations
*
+ * Copyright (C) 2008 Texas Instruments Inc.
* Copyright (C) 2003 - 2005 Nokia Corporation
*
* Written by Tony Lindgren <tony.lindgren@xxxxxxxxx>
@@ -38,6 +39,7 @@ static struct omap_mux_cfg arch_mux_cfg;
/* NOTE: See mux.h for the enumeration */
+#ifdef CONFIG_ARCH_OMAP24XX
struct pin_config __initdata_or_module omap24xx_pins[] = {
/*
* description mux mux pull pull debug
@@ -210,12 +212,85 @@ MUX_CFG_24XX("AD16_2430_MCBSP2_CLX_OFF",0x012F, 0, 0, 0, 1)
MUX_CFG_24XX("AE13_2430_MCBSP2_DX_OFF", 0x0130, 0, 0, 0, 1)
MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1)
};
+#endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#ifdef CONFIG_ARCH_OMAP34XX
+struct pin_config __initdata_or_module omap34xx_pins[] = {
+/*
+ * description mux mux pull pull inp
+ * offset mode ena type ena
+ *
+ * off off off off off wkup
+ * ena outen outval pullen pulltyp en
+ */
+
+/* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
+MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP", 0x5d8, 3, 1, 1, 0,
+ 0, 0, 0, 1, 1, 0)
+MUX_CFG_34XX("Y8_3430_USB1HS_PHY_CLK", 0x5da, 3, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("W13_3430_USB1HS_PHY_D0", 0x5dc, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("W12_3430_USB1HS_PHY_D1", 0x5de, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("W11_3430_USB1HS_PHY_D2", 0x5e0, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("Y13_3430_USB1HS_PHY_D7", 0x5e2, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("W9_3430_USB1HS_PHY_D4", 0x5e4, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("Y12_3430_USB1HS_PHY_D5", 0x5e6, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("W8_3430_USB1HS_PHY_D6", 0x5e8, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("Y11_3430_USB1HS_PHY_D3", 0x5ea, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("AA14_3430_USB1HS_PHY_DIR", 0x5ec, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("AA11_3430_USB1HS_PHY_NXT", 0x5ee, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+
+/* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
+MUX_CFG_34XX("AA8_3430_USB2HS_PHY_CLK", 0x5f0, 3, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("AA10_3430_USB2HS_PHY_STP", 0x5f2, 3, 1, 1, 0,
+ 0, 0, 0, 1, 1, 0)
+MUX_CFG_34XX("AA9_3430_USB2HS_PHY_DIR", 0x5f4, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("AB11_3430_USB2HS_PHY_NXT", 0x5f6, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("AB10_3430_USB2HS_PHY_D0", 0x5f8, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("AB9_3430_USB2HS_PHY_D1", 0x5fa, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("W3_3430_USB2HS_PHY_D2", 0x1d4, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("T2_3430_USB2HS_PHY_D7", 0x1d6, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("T3_3430_USB2HS_PHY_D4", 0x1d8, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("R3_3430_USB2HS_PHY_D5", 0x1da, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("R4_3430_USB2HS_PHY_D6", 0x1dc, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("T4_3430_USB2HS_PHY_D3", 0x1de, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+};
+#endif
#define OMAP24XX_PULL_ENA (1 << 3)
#define OMAP24XX_PULL_UP (1 << 4)
+#define OMAP3_INPUT_EN (1 << 8)
+#define OMAP3_OFF_EN (1 << 9)
+#define OMAP3_OFFOUT_EN (1 << 10)
+#define OMAP3_OFFOUT_VAL (1 << 11)
+#define OMAP3_OFF_PULL_EN (1 << 12)
+#define OMAP3_OFF_PULL_UP (1 << 13)
+#define OMAP3_WAKEUP_EN (1 << 14)
+
+#ifdef CONFIG_ARCH_OMAP24XX
+
/* REVISIT: Convert this code to use ctrl_{read,write}_reg */
int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
{
@@ -248,6 +323,69 @@ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
}
#endif
+#ifdef CONFIG_ARCH_OMAP34XX
+/* REVISIT: Convert this code to use ctrl_{read,write}_reg */
+int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
+{
+ static DEFINE_SPINLOCK(mux_spin_lock);
+ unsigned long flags;
+ u8 reg = 0;
+ unsigned int warn = 0;
+
+ spin_lock_irqsave(&mux_spin_lock, flags);
+
+ reg |= cfg->mask & 0x7;
+
+ if (cfg->pull_val)
+ reg |= OMAP24XX_PULL_ENA;
+ if(cfg->pu_pd_val)
+ reg |= OMAP24XX_PULL_UP;
+
+ if (cfg->input_en_val)
+ reg |= OMAP3_INPUT_EN;
+
+ if (cfg->offenable)
+ reg |= OMAP3_OFF_EN;
+
+ if (cfg->offoutenable)
+ reg |= OMAP3_OFFOUT_EN;
+
+ if (cfg->offoutvalue)
+ reg |= OMAP3_OFFOUT_VAL;
+
+ if (cfg->offpulludenable)
+ reg |= OMAP3_OFF_PULL_EN;
+
+ if (cfg->offpulltypeselect)
+ reg |= OMAP3_OFF_PULL_UP;
+
+ if (cfg->wakeupenable)
+ reg |= OMAP3_WAKEUP_EN;
+
+#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
+ {
+ u8 orig = omap_readw(omap2_ctrl_base + cfg->mux_reg);
+ u8 debug = 0;
+
+#ifdef CONFIG_OMAP_MUX_DEBUG
+ debug = cfg->debug;
+#endif
+ warn = (orig != reg);
+ if (debug || warn)
+ printk(KERN_WARNING
+ "MUX: setup %s (0x%08lx): 0x%02x -> 0x%02x\n",
+ cfg->name,
+ omap2_ctrl_base + cfg->mux_reg,
+ orig, reg);
+ }
+#endif
+ omap_writew((u16) reg, omap2_ctrl_base + cfg->mux_reg);
+ spin_unlock_irqrestore(&mux_spin_lock, flags);
+
+ return 0;
+}
+#endif
+
int __init omap2_mux_init(void)
{
@@ -259,6 +397,14 @@ int __init omap2_mux_init(void)
}
#endif
+#ifdef CONFIG_ARCH_OMAP34XX
+ if (cpu_is_omap34xx()) {
+ arch_mux_cfg.pins = omap34xx_pins;
+ arch_mux_cfg.size = ARRAY_SIZE(omap34xx_pins);
+ arch_mux_cfg.cfg_reg = omap34xx_cfg_reg;
+ }
+#endif
+
return omap_mux_register(&arch_mux_cfg);
}
diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h
index aa89835..95cabe9 100644
--- a/include/asm-arm/arch-omap/mux.h
+++ b/include/asm-arm/arch-omap/mux.h
@@ -132,6 +132,30 @@
.pu_pd_val = pull_mode, \
},
+#define MUX_CFG_34XX(desc, reg_offset, mode, \
+ pull_en, pull_mode, \
+ input_en, \
+ off_en, \
+ offout_en, \
+ offout_val, \
+ offpullud_en, \
+ offpull_typesel, \
+ wakeup_en) \
+{ \
+ .name = desc, \
+ .debug = 0, \
+ .mux_reg = reg_offset, \
+ .mask = mode, \
+ .pull_val = pull_en, \
+ .pu_pd_val = pull_mode, \
+ .input_en_val = input_en, \
+ .offenable = off_en, \
+ .offoutenable = offout_en, \
+ .offoutvalue = offout_val, \
+ .offpulludenable = offpullud_en, \
+ .offpulltypeselect = offpull_typesel, \
+ .wakeupenable = wakeup_en \
+},
#define PULL_DISABLED 0
#define PULL_ENABLED 1
@@ -157,6 +181,14 @@ struct pin_config {
const char *pu_pd_name;
const unsigned int pu_pd_reg;
const unsigned char pu_pd_val;
+
+ const unsigned input_en_val:1;
+ const unsigned offenable:1;
+ const unsigned offoutenable:1;
+ const unsigned offoutvalue:1;
+ const unsigned offpulludenable:1;
+ const unsigned offpulltypeselect:1;
+ const unsigned wakeupenable:1;
};
enum omap730_index {
@@ -597,6 +629,39 @@ enum omap24xx_index {
AD16_2430_MCBSP2_CLX_OFF,
AE13_2430_MCBSP2_DX_OFF,
AD13_2430_MCBSP2_DR_OFF,
+
+};
+
+enum omap34xx_index {
+
+ /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
+ Y9_3430_USB1HS_PHY_STP,
+ Y8_3430_USB1HS_PHY_CLK,
+ W13_3430_USB1HS_PHY_DATA0,
+ W12_3430_USB1HS_PHY_DATA1,
+ W11_3430_USB1HS_PHY_DATA2,
+ Y13_3430_USB1HS_PHY_DATA7,
+ W9_3430_USB1HS_PHY_DATA4,
+ Y12_3430_USB1HS_PHY_DATA5,
+ W8_3430_USB1HS_PHY_DATA6,
+ Y11_3430_USB1HS_PHY_DATA3,
+ AA14_3430_USB1HS_PHY_DIR,
+ AA11_3430_USB1HS_PHY_NXT,
+
+ /* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
+ AA8_3430_USB2HS_PHY_CLK,
+ AA10_3430_USB2HS_PHY_STP,
+ AA9_3430_USB2HS_PHY_DIR,
+ AB11_3430_USB2HS_PHY_NXT,
+ AB10_3430_USB2HS_PHY_DATA0,
+ AB9_3430_USB2HS_PHY_DATA1,
+ W3_3430_USB2HS_PHY_DATA2,
+ T2_3430_USB2HS_PHY_DATA7,
+ T3_3430_USB2HS_PHY_DATA4,
+ R3_3430_USB2HS_PHY_DATA5,
+ R4_3430_USB2HS_PHY_DATA6,
+ T4_3430_USB2HS_PHY_DATA3,
+
};
struct omap_mux_cfg {
