The omap_cfg_reg() function was a #ifdef mess. While the OMAP2
and OMAP3 are pretty much the same in the way pin-muxing is
configured, the OMAP1 is not. Being the worst contributor to
the mess, obsolete(?) and very different from OMAP2 and OMAP3,
I factored the OMAP1 code to a separate function.
I recommend to hide the OMAP1 mess even better, by moving mux.c
from plat_omap to mach_omap1 and mach_omap2.
Multi-architecture (OMAP2/OMAP3) should work - but I can't see
how to:
/* REVISIT: Convert this code to use ctrl_{read,write}_reg */
(the mux register is 8 bits on OMAP2 and 16 bit on OMAP3).
So I kept the comment.
Signed-off-by: Klaus Pedersen <klaus.k.pedersen@xxxxxxxxx>
---
arch/arm/plat-omap/mux.c | 111 ++++++++++++++++++++++++++++++---------------
1 files changed, 74 insertions(+), 37 deletions(-)
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c
index 32756e0..288ccf4 100644
--- a/arch/arm/plat-omap/mux.c
+++ b/arch/arm/plat-omap/mux.c
@@ -3,6 +3,7 @@
*
* Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h
*
+ * Copyright (C) 2007 Texas Instruments Inc.
* Copyright (C) 2003 - 2005 Nokia Corporation
*
* Written by Tony Lindgren <tony.lindgren@xxxxxxxxx>
@@ -36,16 +37,13 @@
#ifdef CONFIG_OMAP_MUX
-#define OMAP24XX_PULL_ENA (1 << 3)
-#define OMAP24XX_PULL_UP (1 << 4)
+#define OMAP2_PULL_EN (1 << 3)
+#define OMAP2_PULL_UP (1 << 4)
+#define OMAP3_INPUT_EN (1 << 8)
static struct pin_config * pin_table;
static unsigned long pin_table_sz;
-extern struct pin_config * omap730_pins;
-extern struct pin_config * omap1xxx_pins;
-extern struct pin_config * omap24xx_pins;
-
int __init omap_mux_register(struct pin_config * pins, unsigned long size)
{
pin_table = pins;
@@ -54,6 +52,8 @@ int __init omap_mux_register(struct pin_config * pins, unsigned long size)
return 0;
}
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+
/*
* Sets the Omap MUX and PULL_DWN registers based on the table
*/
@@ -63,9 +63,8 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
unsigned long flags;
struct pin_config *cfg;
- unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0,
- pull_orig = 0, pull = 0;
- unsigned int mask, warn = 0;
+ unsigned int reg_orig = 0, reg = 0;
+ unsigned int warn = 0;
if (!pin_table)
BUG();
@@ -78,37 +77,71 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
}
cfg = (struct pin_config *)&pin_table[index];
-#ifdef CONFIG_ARCH_OMAP24XX
/* REVISIT: Convert this code to use ctrl_{read,write}_reg */
+ /* - currently this is not feasible because the size of "reg" */
- if (cpu_is_omap24xx()) {
- u8 reg = 0;
-
- reg |= cfg->mask & 0x7;
- if (cfg->pull_val)
- reg |= OMAP24XX_PULL_ENA;
- if(cfg->pu_pd_val)
- reg |= OMAP24XX_PULL_UP;
-#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
- {
- u8 orig = omap_readb(omap2_ctrl_base + cfg->mux_reg);
- u8 debug = 0;
+ if (cfg->mux_reg) {
+ spin_lock_irqsave(&mux_spin_lock, flags);
+ if (cpu_class_is_omap2()) {
+ reg = cfg->mask & 0x7;
+
+ if (cfg->pull_val)
+ reg |= OMAP2_PULL_EN;
+ if (cfg->pu_pd_val)
+ reg |= OMAP2_PULL_UP;
+
+ if (cpu_is_omap24xx()) {
+ reg_orig = omap_readb(omap2_ctrl_base + cfg->mux_reg);
+ omap_writeb((u8)reg, omap2_ctrl_base + cfg->mux_reg);
+ } else if (cpu_is_omap34xx()) {
+ if (cfg->input_en_val)
+ reg |= OMAP3_INPUT_EN;
+ reg_orig = omap_readw(omap2_ctrl_base + cfg->mux_reg);
+ omap_writew((u16)reg, omap2_ctrl_base + cfg->mux_reg);
+ }
-#ifdef CONFIG_OMAP_MUX_DEBUG
- debug = cfg->debug;
-#endif
- warn = (orig != reg);
- if (debug || warn)
- printk("MUX: setup %s (0x%08lx): 0x%02x -> 0x%02x\n",
- cfg->name,
- omap2_ctrl_base + cfg->mux_reg,
- orig, reg);
+ warn = (reg_orig != reg);
}
+ spin_unlock_irqrestore(&mux_spin_lock, flags);
+
+#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
+#if defined(CONFIG_OMAP_MUX_DEBUG)
+ warn |= cfg->debug;
+#endif
+ if (warn)
+ printk("MUX: setup %s (0x%08lx): 0x%02x -> 0x%02x\n",
+ cfg->name,
+ omap2_ctrl_base + cfg->mux_reg,
+ reg_orig, reg);
#endif
- omap_writeb(reg, omap2_ctrl_base + cfg->mux_reg);
+ }
+ return 0;
+}
+
+#else
+
+/*
+ * Sets the Omap MUX and PULL_DWN registers based on the table
+ */
+int __init_or_module omap_cfg_reg(const unsigned long index)
+{
+ static DEFINE_SPINLOCK(mux_spin_lock);
+
+ unsigned long flags;
+ struct pin_config *cfg;
+ unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0,
+ pull_orig = 0, pull = 0;
+ unsigned int mask, warn = 0;
- return 0;
+ if (!pin_table)
+ BUG();
+
+ if (index >= pin_table_sz) {
+ printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
+ index, pin_table_sz);
+ dump_stack();
+ return -ENODEV;
}
-#endif /* ARCH_OMAP24XX */
+ cfg = (struct pin_config *)&pin_table[index];
/* Check the mux register in question */
if (cfg->mux_reg) {
@@ -130,6 +163,8 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
omap_writel(reg, cfg->mux_reg);
spin_unlock_irqrestore(&mux_spin_lock, flags);
+ if (cpu_class_is_omap2())
+ goto _print;
}
/* Check for pull up or pull down selection on 1610 */
@@ -177,6 +212,7 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
spin_unlock_irqrestore(&mux_spin_lock, flags);
}
+_print:
if (warn) {
#ifdef CONFIG_OMAP_MUX_WARNINGS
printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
@@ -209,8 +245,9 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
return 0;
#endif
}
+#endif /* defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) */
+
EXPORT_SYMBOL(omap_cfg_reg);
-#else
-#define omap_mux_init() do {} while(0)
-#define omap_cfg_reg(x) do {} while(0)
+
#endif /* CONFIG_OMAP_MUX */
+
--
1.5.3.3
-
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