This patch adds pinmux support for OMAP3.
Tested on OMAP3430SDP. Compile tested for 2430.
Signed-off-by: Anand Gadiyar <gadiyar@xxxxxx>
Acked-by: Vikram Pandita <vikram.pandita@xxxxxx>
---
arch/arm/mach-omap2/mux.c | 71 +++++++++++++++++++++++++++-
arch/arm/plat-omap/mux.c | 99 ++++++++++++++++++++++++++--------------
include/asm-arm/arch-omap/mux.h | 65 ++++++++++++++++++++++++++
3 files changed, 200 insertions(+), 35 deletions(-)
Index: linux-omap-2.6/include/asm-arm/arch-omap/mux.h
===================================================================
--- linux-omap-2.6.orig/include/asm-arm/arch-omap/mux.h 2008-01-11 17:25:08.161188070 +0530
+++ linux-omap-2.6/include/asm-arm/arch-omap/mux.h 2008-01-11 17:26:57.979660675 +0530
@@ -132,6 +132,30 @@
.pu_pd_val = pull_mode, \
},
+#define MUX_CFG_34XX(desc, reg_offset, mode, \
+ pull_en, pull_mode, \
+ input_en, \
+ off_en, \
+ offout_en, \
+ offout_val, \
+ offpullud_en, \
+ offpull_typesel, \
+ wakeup_en) \
+{ \
+ .name = desc, \
+ .debug = 0, \
+ .mux_reg = reg_offset, \
+ .mask = mode, \
+ .pull_val = pull_en, \
+ .pu_pd_val = pull_mode, \
+ .input_en_val = input_en, \
+ .offenable = off_en, \
+ .offoutenable = offout_en, \
+ .offoutvalue = offout_val, \
+ .offpulludenable = offpullud_en, \
+ .offpulltypeselect = offpull_typesel, \
+ .wakeupenable = wakeup_en \
+},
#define PULL_DISABLED 0
#define PULL_ENABLED 1
@@ -157,6 +181,14 @@
const char *pu_pd_name;
const unsigned int pu_pd_reg;
const unsigned char pu_pd_val;
+
+ const unsigned input_en_val:1;
+ const unsigned offenable:1;
+ const unsigned offoutenable:1;
+ const unsigned offoutvalue:1;
+ const unsigned offpulludenable:1;
+ const unsigned offpulltypeselect:1;
+ const unsigned wakeupenable:1;
};
enum omap730_index {
@@ -597,6 +629,39 @@
AD16_2430_MCBSP2_CLX_OFF,
AE13_2430_MCBSP2_DX_OFF,
AD13_2430_MCBSP2_DR_OFF,
+
+};
+
+enum omap34xx_index {
+
+ /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
+ Y9_3430_USB1HS_PHY_STP,
+ Y8_3430_USB1HS_PHY_CLK,
+ W13_3430_USB1HS_PHY_DATA0,
+ W12_3430_USB1HS_PHY_DATA1,
+ W11_3430_USB1HS_PHY_DATA2,
+ Y13_3430_USB1HS_PHY_DATA7,
+ W9_3430_USB1HS_PHY_DATA4,
+ Y12_3430_USB1HS_PHY_DATA5,
+ W8_3430_USB1HS_PHY_DATA6,
+ Y11_3430_USB1HS_PHY_DATA3,
+ AA14_3430_USB1HS_PHY_DIR,
+ AA11_3430_USB1HS_PHY_NXT,
+
+ /* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
+ AA8_3430_USB2HS_PHY_CLK,
+ AA10_3430_USB2HS_PHY_STP,
+ AA9_3430_USB2HS_PHY_DIR,
+ AB11_3430_USB2HS_PHY_NXT,
+ AB10_3430_USB2HS_PHY_DATA0,
+ AB9_3430_USB2HS_PHY_DATA1,
+ W3_3430_USB2HS_PHY_DATA2,
+ T2_3430_USB2HS_PHY_DATA7,
+ T3_3430_USB2HS_PHY_DATA4,
+ R3_3430_USB2HS_PHY_DATA5,
+ R4_3430_USB2HS_PHY_DATA6,
+ T4_3430_USB2HS_PHY_DATA3,
+
};
#ifdef CONFIG_OMAP_MUX
Index: linux-omap-2.6/arch/arm/plat-omap/mux.c
===================================================================
--- linux-omap-2.6.orig/arch/arm/plat-omap/mux.c 2008-01-11 17:25:08.161188070 +0530
+++ linux-omap-2.6/arch/arm/plat-omap/mux.c 2008-01-11 17:27:25.674771149 +0530
@@ -3,6 +3,7 @@
*
* Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h
*
+ * Copyright (C) 2008 Texas Instruments Inc.
* Copyright (C) 2003 - 2005 Nokia Corporation
*
* Written by Tony Lindgren <tony.lindgren@xxxxxxxxx>
@@ -39,12 +40,17 @@
#define OMAP24XX_PULL_ENA (1 << 3)
#define OMAP24XX_PULL_UP (1 << 4)
-static struct pin_config * pin_table;
-static unsigned long pin_table_sz;
+#define OMAP3_INPUT_EN (1 << 8)
+#define OMAP3_OFF_EN (1 << 9)
+#define OMAP3_OFFOUT_EN (1 << 10)
+#define OMAP3_OFFOUT_VAL (1 << 11)
+#define OMAP3_OFF_PULL_EN (1 << 12)
+#define OMAP3_OFF_PULL_UP (1 << 13)
+#define OMAP3_WAKEUP_EN (1 << 14)
+
-extern struct pin_config * omap730_pins;
-extern struct pin_config * omap1xxx_pins;
-extern struct pin_config * omap24xx_pins;
+static struct pin_config *pin_table;
+static unsigned long pin_table_sz;
int __init omap_mux_register(struct pin_config * pins, unsigned long size)
{
@@ -65,7 +71,7 @@
struct pin_config *cfg;
unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0,
pull_orig = 0, pull = 0;
- unsigned int mask, warn = 0;
+ unsigned int mask, warn = 0, debug = 0;
if (!pin_table)
BUG();
@@ -78,37 +84,64 @@
}
cfg = (struct pin_config *)&pin_table[index];
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
/* REVISIT: Convert this code to use ctrl_{read,write}_reg */
- if (cpu_is_omap24xx()) {
- u8 reg = 0;
+ spin_lock_irqsave(&mux_spin_lock, flags);
- reg |= cfg->mask & 0x7;
- if (cfg->pull_val)
- reg |= OMAP24XX_PULL_ENA;
- if(cfg->pu_pd_val)
- reg |= OMAP24XX_PULL_UP;
-#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
- {
- u8 orig = omap_readb(omap2_ctrl_base + cfg->mux_reg);
- u8 debug = 0;
-
-#ifdef CONFIG_OMAP_MUX_DEBUG
- debug = cfg->debug;
-#endif
- warn = (orig != reg);
- if (debug || warn)
- printk("MUX: setup %s (0x%08lx): 0x%02x -> 0x%02x\n",
- cfg->name,
- omap2_ctrl_base + cfg->mux_reg,
- orig, reg);
- }
-#endif
- omap_writeb(reg, omap2_ctrl_base + cfg->mux_reg);
+ reg |= cfg->mask & 0x7;
+
+ if (cfg->pull_val)
+ reg |= OMAP24XX_PULL_ENA;
+ if(cfg->pu_pd_val)
+ reg |= OMAP24XX_PULL_UP;
+
+ if (cpu_is_omap34xx()) {
+
+ if (cfg->input_en_val)
+ reg |= OMAP3_INPUT_EN;
- return 0;
+ if (cfg->offenable)
+ reg |= OMAP3_OFF_EN;
+
+ if (cfg->offoutenable)
+ reg |= OMAP3_OFFOUT_EN;
+
+ if (cfg->offoutvalue)
+ reg |= OMAP3_OFFOUT_VAL;
+
+ if (cfg->offpulludenable)
+ reg |= OMAP3_OFF_PULL_EN;
+
+ if (cfg->offpulltypeselect)
+ reg |= OMAP3_OFF_PULL_UP;
+
+ if (cfg->wakeupenable)
+ reg |= OMAP3_WAKEUP_EN;
}
-#endif /* ARCH_OMAP24XX */
+
+#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
+ if (cpu_is_omap24xx())
+ reg_orig = omap_readb(omap2_ctrl_base + cfg->mux_reg);
+ else if (cpu_is_omap34xx())
+ reg_orig = omap_readw(omap2_ctrl_base + cfg->mux_reg);
+#ifdef CONFIG_OMAP_MUX_DEBUG
+ debug = cfg->debug;
+#endif
+ warn = (reg_orig != reg);
+ if (debug || warn)
+ printk(KERN_WARNING
+ "MUX: setup %s (0x%08lx): 0x%02x -> 0x%02x\n",
+ cfg->name,
+ omap2_ctrl_base + cfg->mux_reg,
+ reg_orig, reg);
+#endif
+ if (cpu_is_omap24xx())
+ omap_writeb((u8) reg, omap2_ctrl_base + cfg->mux_reg);
+ else if (cpu_is_omap34xx())
+ omap_writew((u16) reg, omap2_ctrl_base + cfg->mux_reg);
+ spin_unlock_irqrestore(&mux_spin_lock, flags);
+ return 0;
+#endif /* ARCH_OMAP24XX || ARCH_OMAP34XX*/
/* Check the mux register in question */
if (cfg->mux_reg) {
Index: linux-omap-2.6/arch/arm/mach-omap2/mux.c
===================================================================
--- linux-omap-2.6.orig/arch/arm/mach-omap2/mux.c 2008-01-11 17:25:08.161188070 +0530
+++ linux-omap-2.6/arch/arm/mach-omap2/mux.c 2008-01-11 17:27:12.331199722 +0530
@@ -1,8 +1,9 @@
/*
* linux/arch/arm/mach-omap2/mux.c
*
- * OMAP1 pin multiplexing configurations
+ * OMAP2 and OMAP3 pin multiplexing configurations
*
+ * Copyright (C) 2008 Texas Instruments Inc.
* Copyright (C) 2003 - 2005 Nokia Corporation
*
* Written by Tony Lindgren <tony.lindgren@xxxxxxxxx>
@@ -207,9 +208,75 @@
MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1)
};
+struct pin_config __initdata_or_module omap34xx_pins[] = {
+/*
+ * description mux mux pull pull inp
+ * offset mode ena type ena
+ *
+ * off off off off off wkup
+ * ena outen outval pullen pulltyp en
+ */
+
+/* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
+MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP", 0x5d8, 3, 1, 1, 0,
+ 0, 0, 0, 1, 1, 0)
+MUX_CFG_34XX("Y8_3430_USB1HS_PHY_CLK", 0x5da, 3, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("W13_3430_USB1HS_PHY_D0", 0x5dc, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("W12_3430_USB1HS_PHY_D1", 0x5de, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("W11_3430_USB1HS_PHY_D2", 0x5e0, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("Y13_3430_USB1HS_PHY_D7", 0x5e2, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("W9_3430_USB1HS_PHY_D4", 0x5e4, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("Y12_3430_USB1HS_PHY_D5", 0x5e6, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("W8_3430_USB1HS_PHY_D6", 0x5e8, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("Y11_3430_USB1HS_PHY_D3", 0x5ea, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("AA14_3430_USB1HS_PHY_DIR", 0x5ec, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("AA11_3430_USB1HS_PHY_NXT", 0x5ee, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+
+/* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
+MUX_CFG_34XX("AA8_3430_USB2HS_PHY_CLK", 0x5f0, 3, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("AA10_3430_USB2HS_PHY_STP", 0x5f2, 3, 1, 1, 0,
+ 0, 0, 0, 1, 1, 0)
+MUX_CFG_34XX("AA9_3430_USB2HS_PHY_DIR", 0x5f4, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("AB11_3430_USB2HS_PHY_NXT", 0x5f6, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("AB10_3430_USB2HS_PHY_D0", 0x5f8, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("AB9_3430_USB2HS_PHY_D1", 0x5fa, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("W3_3430_USB2HS_PHY_D2", 0x1d4, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("T2_3430_USB2HS_PHY_D7", 0x1d6, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("T3_3430_USB2HS_PHY_D4", 0x1d8, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("R3_3430_USB2HS_PHY_D5", 0x1da, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("R4_3430_USB2HS_PHY_D6", 0x1dc, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+MUX_CFG_34XX("T4_3430_USB2HS_PHY_D3", 0x1de, 3, 0, 0, 1,
+ 0, 0, 0, 0, 0, 0)
+
+};
+
int __init omap2_mux_init(void)
{
- omap_mux_register(omap24xx_pins, ARRAY_SIZE(omap24xx_pins));
+ if (cpu_is_omap24xx())
+ omap_mux_register(omap24xx_pins, ARRAY_SIZE(omap24xx_pins));
+ else if (cpu_is_omap34xx())
+ omap_mux_register(omap34xx_pins, ARRAY_SIZE(omap34xx_pins));
return 0;
}
-
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