>From 2f910700b23039c5bfce395c9c6d7474a1d35fe6 Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony@xxxxxxxxxxx>
Date: Tue, 22 Jan 2008 17:06:34 -0800
Subject: [PATCH] ARM: OMAP: Split omap_cfg_reg() into omap processor specific functions
Use omap processor specific function depending on system type.
Based on an earlier patch by Klaus Pedersen <klaus.k.pedersen@xxxxxxxxx>.
Signed-off-by: Tony Lindgren <tony@xxxxxxxxxxx>
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index d74f679..cf3bdc0 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -314,7 +314,110 @@ MUX_CFG("Y14_1610_CCP_DATAM", 9, 21, 6, 2, 3, 1, 2, 0, 0)
int __init_or_module omap1_cfg_reg(const struct pin_config *cfg)
{
+ static DEFINE_SPINLOCK(mux_spin_lock);
+ unsigned long flags;
+ unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0,
+ pull_orig = 0, pull = 0;
+ unsigned int mask, warn = 0;
+
+ /* Check the mux register in question */
+ if (cfg->mux_reg) {
+ unsigned tmp1, tmp2;
+
+ spin_lock_irqsave(&mux_spin_lock, flags);
+ reg_orig = omap_readl(cfg->mux_reg);
+
+ /* The mux registers always seem to be 3 bits long */
+ mask = (0x7 << cfg->mask_offset);
+ tmp1 = reg_orig & mask;
+ reg = reg_orig & ~mask;
+
+ tmp2 = (cfg->mask << cfg->mask_offset);
+ reg |= tmp2;
+
+ if (tmp1 != tmp2)
+ warn = 1;
+
+ omap_writel(reg, cfg->mux_reg);
+ spin_unlock_irqrestore(&mux_spin_lock, flags);
+ }
+
+ /* Check for pull up or pull down selection on 1610 */
+ if (!cpu_is_omap15xx()) {
+ if (cfg->pu_pd_reg && cfg->pull_val) {
+ spin_lock_irqsave(&mux_spin_lock, flags);
+ pu_pd_orig = omap_readl(cfg->pu_pd_reg);
+ mask = 1 << cfg->pull_bit;
+
+ if (cfg->pu_pd_val) {
+ if (!(pu_pd_orig & mask))
+ warn = 1;
+ /* Use pull up */
+ pu_pd = pu_pd_orig | mask;
+ } else {
+ if (pu_pd_orig & mask)
+ warn = 1;
+ /* Use pull down */
+ pu_pd = pu_pd_orig & ~mask;
+ }
+ omap_writel(pu_pd, cfg->pu_pd_reg);
+ spin_unlock_irqrestore(&mux_spin_lock, flags);
+ }
+ }
+
+ /* Check for an associated pull down register */
+ if (cfg->pull_reg) {
+ spin_lock_irqsave(&mux_spin_lock, flags);
+ pull_orig = omap_readl(cfg->pull_reg);
+ mask = 1 << cfg->pull_bit;
+
+ if (cfg->pull_val) {
+ if (pull_orig & mask)
+ warn = 1;
+ /* Low bit = pull enabled */
+ pull = pull_orig & ~mask;
+ } else {
+ if (!(pull_orig & mask))
+ warn = 1;
+ /* High bit = pull disabled */
+ pull = pull_orig | mask;
+ }
+
+ omap_writel(pull, cfg->pull_reg);
+ spin_unlock_irqrestore(&mux_spin_lock, flags);
+ }
+
+ if (warn) {
+#ifdef CONFIG_OMAP_MUX_WARNINGS
+ printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
+#endif
+ }
+
+#ifdef CONFIG_OMAP_MUX_DEBUG
+ if (cfg->debug || warn) {
+ printk("MUX: Setting register %s\n", cfg->name);
+ printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
+ cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
+
+ if (!cpu_is_omap15xx()) {
+ if (cfg->pu_pd_reg && cfg->pull_val) {
+ printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
+ cfg->pu_pd_name, cfg->pu_pd_reg,
+ pu_pd_orig, pu_pd);
+ }
+ }
+
+ if (cfg->pull_reg)
+ printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
+ cfg->pull_name, cfg->pull_reg, pull_orig, pull);
+ }
+#endif
+
+#ifdef CONFIG_OMAP_MUX_ERRORS
+ return warn ? -ETXTBSY : 0;
+#else
return 0;
+#endif
}
int __init omap1_mux_init(void)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index fdbf12f..0cd7316 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -30,6 +30,8 @@
#include <asm/arch/mux.h>
+#include "../mach-omap2/control.h"
+
#ifdef CONFIG_OMAP_MUX
static struct omap_mux_cfg arch_mux_cfg;
@@ -210,8 +212,38 @@ MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1)
};
#ifdef CONFIG_ARCH_OMAP24XX
+
+#define OMAP24XX_PULL_ENA (1 << 3)
+#define OMAP24XX_PULL_UP (1 << 4)
+
+/* REVISIT: Convert this code to use ctrl_{read,write}_reg */
int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
{
+ u8 reg = 0;
+ unsigned int mask, warn = 0;
+
+ reg |= cfg->mask & 0x7;
+ if (cfg->pull_val)
+ reg |= OMAP24XX_PULL_ENA;
+ if(cfg->pu_pd_val)
+ reg |= OMAP24XX_PULL_UP;
+#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
+ {
+ u8 orig = omap_readb(omap2_ctrl_base + cfg->mux_reg);
+ u8 debug = 0;
+
+#ifdef CONFIG_OMAP_MUX_DEBUG
+ debug = cfg->debug;
+#endif
+ warn = (orig != reg);
+ if (debug || warn)
+ printk("MUX: setup %s (0x%08lx): 0x%02x -> 0x%02x\n",
+ cfg->name, omap2_ctrl_base + cfg->mux_reg,
+ orig, reg);
+ }
+#endif
+ omap_writeb(reg, omap2_ctrl_base + cfg->mux_reg);
+
return 0;
}
#endif
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c
index d15b572..4de18b9 100644
--- a/arch/arm/plat-omap/mux.c
+++ b/arch/arm/plat-omap/mux.c
@@ -30,15 +30,8 @@
#include <linux/spinlock.h>
#include <asm/arch/mux.h>
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
-# include "../mach-omap2/control.h"
-#endif
-
#ifdef CONFIG_OMAP_MUX
-#define OMAP24XX_PULL_ENA (1 << 3)
-#define OMAP24XX_PULL_UP (1 << 4)
-
static struct omap_mux_cfg *mux_cfg;
int __init omap_mux_register(struct omap_mux_cfg *arch_mux_cfg)
@@ -59,13 +52,7 @@ int __init omap_mux_register(struct omap_mux_cfg *arch_mux_cfg)
*/
int __init_or_module omap_cfg_reg(const unsigned long index)
{
- static DEFINE_SPINLOCK(mux_spin_lock);
-
- unsigned long flags;
- struct pin_config *cfg;
- unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0,
- pull_orig = 0, pull = 0;
- unsigned int mask, warn = 0;
+ struct pin_config *reg;
if (mux_cfg == NULL) {
printk(KERN_ERR "Pin mux table not initialized\n");
@@ -79,137 +66,12 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
return -ENODEV;
}
- cfg = (struct pin_config *)&mux_cfg->pins[index];
-#ifdef CONFIG_ARCH_OMAP24XX
- /* REVISIT: Convert this code to use ctrl_{read,write}_reg */
- if (cpu_is_omap24xx()) {
- u8 reg = 0;
-
- reg |= cfg->mask & 0x7;
- if (cfg->pull_val)
- reg |= OMAP24XX_PULL_ENA;
- if(cfg->pu_pd_val)
- reg |= OMAP24XX_PULL_UP;
-#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
- {
- u8 orig = omap_readb(omap2_ctrl_base + cfg->mux_reg);
- u8 debug = 0;
-
-#ifdef CONFIG_OMAP_MUX_DEBUG
- debug = cfg->debug;
-#endif
- warn = (orig != reg);
- if (debug || warn)
- printk("MUX: setup %s (0x%08lx): 0x%02x -> 0x%02x\n",
- cfg->name,
- omap2_ctrl_base + cfg->mux_reg,
- orig, reg);
- }
-#endif
- omap_writeb(reg, omap2_ctrl_base + cfg->mux_reg);
-
- return 0;
- }
-#endif /* ARCH_OMAP24XX */
-
- /* Check the mux register in question */
- if (cfg->mux_reg) {
- unsigned tmp1, tmp2;
-
- spin_lock_irqsave(&mux_spin_lock, flags);
- reg_orig = omap_readl(cfg->mux_reg);
-
- /* The mux registers always seem to be 3 bits long */
- mask = (0x7 << cfg->mask_offset);
- tmp1 = reg_orig & mask;
- reg = reg_orig & ~mask;
-
- tmp2 = (cfg->mask << cfg->mask_offset);
- reg |= tmp2;
-
- if (tmp1 != tmp2)
- warn = 1;
-
- omap_writel(reg, cfg->mux_reg);
- spin_unlock_irqrestore(&mux_spin_lock, flags);
- }
-
- /* Check for pull up or pull down selection on 1610 */
- if (!cpu_is_omap15xx()) {
- if (cfg->pu_pd_reg && cfg->pull_val) {
- spin_lock_irqsave(&mux_spin_lock, flags);
- pu_pd_orig = omap_readl(cfg->pu_pd_reg);
- mask = 1 << cfg->pull_bit;
+ reg = (struct pin_config *)&mux_cfg->pins[index];
- if (cfg->pu_pd_val) {
- if (!(pu_pd_orig & mask))
- warn = 1;
- /* Use pull up */
- pu_pd = pu_pd_orig | mask;
- } else {
- if (pu_pd_orig & mask)
- warn = 1;
- /* Use pull down */
- pu_pd = pu_pd_orig & ~mask;
- }
- omap_writel(pu_pd, cfg->pu_pd_reg);
- spin_unlock_irqrestore(&mux_spin_lock, flags);
- }
- }
-
- /* Check for an associated pull down register */
- if (cfg->pull_reg) {
- spin_lock_irqsave(&mux_spin_lock, flags);
- pull_orig = omap_readl(cfg->pull_reg);
- mask = 1 << cfg->pull_bit;
-
- if (cfg->pull_val) {
- if (pull_orig & mask)
- warn = 1;
- /* Low bit = pull enabled */
- pull = pull_orig & ~mask;
- } else {
- if (!(pull_orig & mask))
- warn = 1;
- /* High bit = pull disabled */
- pull = pull_orig | mask;
- }
-
- omap_writel(pull, cfg->pull_reg);
- spin_unlock_irqrestore(&mux_spin_lock, flags);
- }
-
- if (warn) {
-#ifdef CONFIG_OMAP_MUX_WARNINGS
- printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
-#endif
- }
-
-#ifdef CONFIG_OMAP_MUX_DEBUG
- if (cfg->debug || warn) {
- printk("MUX: Setting register %s\n", cfg->name);
- printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
- cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
-
- if (!cpu_is_omap15xx()) {
- if (cfg->pu_pd_reg && cfg->pull_val) {
- printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
- cfg->pu_pd_name, cfg->pu_pd_reg,
- pu_pd_orig, pu_pd);
- }
- }
-
- if (cfg->pull_reg)
- printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
- cfg->pull_name, cfg->pull_reg, pull_orig, pull);
- }
-#endif
+ if (!mux_cfg->cfg_reg)
+ return -ENODEV;
-#ifdef CONFIG_OMAP_MUX_ERRORS
- return warn ? -ETXTBSY : 0;
-#else
- return 0;
-#endif
+ return mux_cfg->cfg_reg(reg);
}
EXPORT_SYMBOL(omap_cfg_reg);
#else
