On 12/06/2012 04:49 PM, Frank Schäfer wrote:
Did you switch back to
.mpeg_mode = LGDT3305_MPEG_SERIAL,
.tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
in struct lgdt3305_config em2874_lgdt3305_dev (em28xx-dvb.c) before
testing this ?
I did not, but switching back doesn't help.
You could also play with the other gpio settings.
Can you give me some examples of what I might want to try. I don't
really understand these gpio settings.
And the last idea (at the moment):
+ /* 0db0:8810 MSI DIGIVOX ATSC (HU345-Q)
+ * Empia EM2874B + TDA18271HDC2 + LGDT3305 */
+ [EM2874_BOARD_MSI_DIGIVOX_ATSC] = {
+ .name = "MSI DIGIVOX ATSC",
+ .dvb_gpio = msi_digivox_atsc,
+ .has_dvb = 1,
+ .tuner_type = TUNER_ABSENT,
+ .ir_codes = RC_MAP_MSI_DIGIVOX_III, /* just a guess
from looking at the picture */
+ .xclk = EM28XX_XCLK_FREQUENCY_12MHZ, /* TODO */
+ .i2c_speed = EM2874_I2C_SECONDARY_BUS_SELECT |
+ EM28XX_I2C_CLK_WAIT_ENABLE |
+ EM28XX_I2C_FREQ_100_KHZ,
+ },
=> change .xclk to 0x0f.
We know that 12MHz is the right xclk setting, which means 0x07. But OTOH
the Windows drivers seems to use 0x0f instead and we don't what 0x0f
means...
Unfortunately, this didn't make a difference either.
Here is my current sent of changes against upstream:
http://pyther.net/a/digivox_atsc/diff-Dec-06-v1.patch
Hope this helps,
Frank
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