On Sat, Jun 28, 2008 at 02:30:36PM +0400, Sergei Shtylyov wrote: > Hello. > > Anton Vorontsov wrote: >> IDE interrupt handler relies on the fact that, if necessary, hardirqs >> will re-trigger on ISR exit. The assumption is valid for level sensitive >> interrupts. >> > > It's valid for both edge and level triggered interrupts. I think this is depends on PIC, whether it can or can not detect masked edge interrupts... >> But some hardware (namely ULi M5228 in the ULi M1575 "Super South Brige") >> behaves in a strange way: it asserts interrupts as edge sensitive. And >> because preemptable IRQ handler disables PIC's interrupt, PIC will likely >> miss it. >> > > Unmasking an IRQ should re-enable an edge detector in a PIC (or that > detector should even be independent from mask). Should? Hm.. well, I can easily check it. Will just program the MPIC IRQ to edge sensitive, and see if it fixes the problem (not sure if I already tried this, I think I did try). -- Anton Vorontsov email: cbouatmailru@xxxxxxxxx irc://irc.freenode.net/bd2 -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
