On 11/24/2010 10:48 AM, Gleb Natapov wrote:
They *aren't* ISA devices. Look at the PIIX3 spec. All of the
ports for these devices are positively decoded and not sent over the
ISA bus.
Over the external ISA bus you mean?
There is no internal ISA bus. The reality is that the PIIX3 is a
microcontroller and most of the platform devices are probably written in
microcode. That's certainly the case with modern SuperIO chips.
Very specifically, the PIIX3 has a white list of addresses that when it
sees the a PCI bus transaction for those addresses, it asserts DEVSEL#
and then routes the request to the write part of the chip to handle it.
For unhandled transactions, it then forwards them to the ISA bus.
Regards,
Anthony Liguori
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