Hi again, On Fri, Jan 31, 2020 at 08:31:14AM +0100, Henri Cloetens wrote: > >(set (reg:CCmode CC_REG) (compare (reg:SImode d) (reg:SImode c))) > >(set (reg:SImode var1) (match_eq [(reg:CCmode CC_REG) (const_int 0)])) > > Yes, and that is exactly what I DO NOT want. I want: > > (set (reg:BImode var1) (compare (reg:SImode d) (reg:SImode c))) > [var1 is BImode in the CCreg] You will have to decide whether you want conditions in GCC to be modeled as a single bit like this, or as a group of three bits. What fits best depends on what your hardware actually does. What Stefan says is very true, you do not need or want optimised code at expand time. I would add that you do not need or want the RTL expressions to look optimised either: it's only the resulting machine code that you should care about. Using a CCmode result is often written as comparing that CC register against 0, but that does not mean the hardware actually does any work there, it's just picking out what part of the comparison result you care about. > I got it working. It results, however, in non-standard usage of the SUBREG, > and I got what looks like a compiler bug with that. I mean, a checking > routine > reports an error where I do not see one, I disabled it for the time > being, will > find out if it works like this or not. Like said before, this means you did *not* get it working, the bug is in your code. Sorry. Segher
