RE: [PATCH 1/2] media: dt-bindings: Add binding doc for i.MX93 MIPI CSI-2

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Hi Alexander,

Thanks for you comment.

> -----Original Message-----
> From: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx>
> Sent: 2023年7月4日 16:39
> To: linux-media@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; dl-linux-imx
> <linux-imx@xxxxxxx>; G.N. Zhou (OSS) <guoniu.zhou@xxxxxxxxxxx>
> Cc: mchehab@xxxxxxxxxx; laurent.pinchart@xxxxxxxxxxxxxxxx;
> robh+dt@xxxxxxxxxx; krzysztof.kozlowski+dt@xxxxxxxxxx; conor+dt@xxxxxxxxxx;
> jacopo.mondi@xxxxxxxxxxxxxxxx
> Subject: Re: [PATCH 1/2] media: dt-bindings: Add binding doc for i.MX93 MIPI
> CSI-2
> 
> Caution: This is an external email. Please take care when clicking links or opening
> attachments. When in doubt, report the message using the 'Report this email'
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> 
> 
> Hi Guoniu,
> 
> thanks for posting this driver.
> 
> Am Montag, 3. Juli 2023, 13:37:33 CEST schrieb guoniu.zhou@xxxxxxxxxxx:
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> >
> > From: "Guoniu.zhou" <guoniu.zhou@xxxxxxx>
> >
> > Add new binding documentation for DesignWare Core MIPI CSI-2 receiver
> > and DPHY found on NXP i.MX93.
> >
> > Signed-off-by: Guoniu.zhou <guoniu.zhou@xxxxxxx>
> > ---
> >  .../bindings/media/nxp,dwc-mipi-csi2.yaml     | 140
> ++++++++++++++++++
> >  1 file changed, 140 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/media/nxp,dwc-mipi-csi2.yaml
> > b/Documentation/devicetree/bindings/media/nxp,dwc-mipi-csi2.yaml new
> > file mode 100644 index 000000000000..ece6fb8991d4
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/nxp,dwc-mipi-csi2.yaml
> > @@ -0,0 +1,140 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/media/nxp,dwc-mipi-csi2.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: NXP i.MX93 MIPI CSI-2 Host Controller receiver
> > +
> > +maintainers:
> > +  - G.N. Zhou <guoniu.zhou@xxxxxxx>
> > +
> > +description: |-
> > +  The MIPI CSI-2 receiver found on i.MX93 originates from Synopsys
> > +  DesignWare Core and it implements the CSI-2 protocol on the host
> > +  side and a DPHY configured as a Slave acts as the physical layer.
> > +  Two data lanes are supported on i.MX93 family devices and the data
> > +  rate of each lane support up to 1.5Gbps.
> > +
> > +  While the CSI-2 receiver is separate from the MIPI D-PHY IP core,
> > + the PHY is completely wrapped by the CSI-2 controller and expose  a
> > + control interface which only can communicate with CSI-2 controller
> > + This binding thus covers both IP cores.
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - fsl,imx93-mipi-csi2
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  interrupts:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    items:
> > +      - description: The peripheral clock (a.k.a. APB clock)
> > +      - description: The pixel clock
> > +      - description: The MIPI D-PHY clock
> > +
> > +  clock-names:
> > +    items:
> > +      - const: per
> > +      - const: pixel
> > +      - const: phy_cfg
> > +
> > +  power-domains:
> > +    maxItems: 1
> > +
> > +  ports:
> > +    $ref: /schemas/graph.yaml#/properties/ports
> > +
> > +    properties:
> > +      port@0:
> > +        $ref: /schemas/graph.yaml#/$defs/port-base
> > +        unevaluatedProperties: false
> > +        description:
> > +          Input port node, single endpoint describing the CSI-2
> > transmitter. +
> > +        properties:
> > +          endpoint:
> > +            $ref: video-interfaces.yaml#
> > +            unevaluatedProperties: false
> > +
> > +            properties:
> > +              data-lanes:
> > +                minItems: 1
> > +                items:
> > +                  - const: 1
> > +                  - const: 2
> > +
> > +              fsl,hsfreqrange:
> > +                $ref: /schemas/types.yaml#/definitions/uint32
> > +                description:
> > +                  Used to select the desired high speed frequency range
> > +                  according to data lane bit rate. Please refer to i.MX93
> > +                  reference manual MIPI CSI-2 DPHY chapter to get a valid
> > +                  value.
> 
> If this is data lane bit rate specific, shouldn't it be set in s_stream callback or
> similar?

That's correct if we have a formula to calculate it and get data rate from sensor. But Synopsys only
provide a table to search the valid hsfreqrange according to data rate and the values are nonlinear
so I export a property to handle this issue.

> 
> Best regards,
> Alexander
> 
> > +
> > +            required:
> > +              - data-lanes
> > +              - fsl,hsfreqrange
> > +
> > +      port@1:
> > +        $ref: /schemas/graph.yaml#/properties/port
> > +        description:
> > +          Output port node
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +  - clocks
> > +  - clock-names
> > +  - power-domains
> > +  - ports
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/clock/imx93-clock.h>
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +    #include <dt-bindings/interrupt-controller/irq.h>
> > +    #include <dt-bindings/power/fsl,imx93-power.h>
> > +
> > +    mipi-csi@4ae00000 {
> > +        compatible = "fsl,imx93-mipi-csi2";
> > +        reg = <0x4ae00000 0x10000>;
> > +        interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
> > +        clocks = <&clks IMX93_CLK_MIPI_CSI_GATE>,
> > +                 <&clks IMX93_CLK_CAM_PIX>,
> > +                 <&clks IMX93_CLK_MIPI_PHY_CFG>;
> > +        clock-names = "per", "pixel", "phy_cfg";
> > +        power-domains = <&media_blk_ctrl
> IMX93_MEDIABLK_PD_MIPI_CSI>;
> > +
> > +        ports {
> > +            #address-cells = <1>;
> > +            #size-cells = <0>;
> > +
> > +            port@0 {
> > +                reg = <0>;
> > +
> > +                mipi_from_sensor: endpoint {
> > +                    remote-endpoint = <&ap1302_to_mipi>;
> > +                    data-lanes = <1 2>;
> > +                    fsl,hsfreqrange = <0x2c>;
> > +                };
> > +            };
> > +
> > +            port@1 {
> > +                reg = <1>;
> > +
> > +                mipi_to_isi: endpoint {
> > +                    remote-endpoint = <&isi_in>;
> > +                };
> > +            };
> > +        };
> > +    };
> > +...
> 
> 
> --
> TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
> Amtsgericht München, HRB 105018
> Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
> http://www.tq-group.com/
> 





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