Am Sonntag, 26. Juni 2022, 04:11:42 CEST schrieb Samuel Holland: > D1 contains a pin controller similar to previous SoCs, but with some > register layout changes. It includes 6 interrupt-capable pin banks. > > D1s is a low pin count version of the D1 SoC, with some pins omitted. > The remaining pins have the same function assignments as D1. > > Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx> On a D1-Nezha Tested-by: Heiko Stuebner <heiko@xxxxxxxxx>
