ah never mind. since this is interlaced, the pixel clock needs to be half
that to get the right frame refresh rate (60Hz) with a pixel clock of
12.22MHz, it passes.
Now, I am not sure if the pixel clock is effectively set to that, and my
lcd still does not sync, so either the pixel clock is not set right or the
SMI712 is not outputting composite sync (despite my hack to enable it)
Time to get the oscilloscope out...
Bruno
On Wed, 7 Mar 2007, bruno schwander wrote:
ah actually now it is not choosing my modeline and I do not understand why:
(II) Silicon Motionlg: Using hsync range of 14.00-80.00 kHz
(II) Silicon Motionlg: Using vrefresh range of 56.00-76.00 Hz
(II) Silicon MotionClock range: 14.00 to 135.00 MHz
(II) Silicon MotionMode: 640x480 16-bpp, 59.990181Hz
(II) Silicon MotionNot using mode "640x480i" (vrefresh out of range)
(II) Silicon MotionMode: 640x350 16-bpp, 85.079948Hz
(II) Silicon MotionNot using default mode "640x350" (vrefresh out of range)
vrefresh range is 56-76Hz, so why is my 640x480i modeline, at 59.99Hz
vrefresh, rejected ?
the modeline is as follows:
ModeLine "640x480i" 24.44 640 680 728 776 480 480 484 525 Interlace
Composite
bruno
On Wed, 7 Mar 2007, bruno schwander wrote:
I think I figured it out, however it seems that although my modeline
includes 'composite'
DisplayModePtr mode->Flags & V_CSYNC
does not evaluate to true. I assume as long as the 'composite' keyword is
found on the modeline, the flag should be set, right ?
I need to add some debug messages, but this seems a little strange. Is
there something else that needs to be configured, like telling that the
driver actually supports the composite keyword on the modeline ?
On a different note, the latest X release does not seem to work on that
chip. I just get a blank screen. So I started hacking on Xorg 6.8.2 to test
this stuff. I figure XFree86 4.5 should work, but 4.6 does not.
I'll provide patches to all and note on which version it was tested of
course, once it works :-)
bruno
On Tue, 27 Feb 2007, Marc Aurele La France wrote:
On Sun, 25 Feb 2007, bruno schwander wrote:
On Fri, 23 Feb 2007, Marc Aurele La France wrote:
On Thu, 22 Feb 2007, bruno schwander wrote:
A little background: I have a single board PC with a SMI712 (lynxEM+)
graphic chipset. X works like a charm.
The driver currently ignores the V_CSYNC mode flag, so you would need to
come up with a source patch to change that.
I'd be happy to provide a patch, if I can figure where to put that. Since
it is only a matter of setting one register it should be simple enough. I
have (had?) no idea where to start, I'll grep for V_CSYNC and see...
An appropriate spot for such changes would be after calls to vgaHWInit(),
which, in this case, is in SMI_ModeInit().
Marc.
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