Re: barebox image for an spi flash (like m25p0) on an imx7 soc

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On Fri, Mar 06, 2020 at 09:41:42AM +0100, Giorgio Dal Molin wrote:
> Hi all,
> 
> I've just double checked the reg=val entries I have in my DTD for the imx7d
> but could not find anything wrong with it, it is very similar to the
> 'arch/arm/mach-imx/include/mach/flash-header/imx7d-ddr-sabresd.imxcfg'.
> 
> What I don't understand is the absolute address of the DTD present at offset 0x40c:
> in my barebox image it is 0x8000042c: when the rom code in the imx7 reads the image
> from the qspi flash it must transfer it to the OCRAM (0x00910000) because it is
> the only memory that works at this early stage of the boot process; but then, when it
> searches for the DCD it finds its absolute address, at offset 040c, to be 0x8000042c;
> but this address is on the DDR space that is still not configured and so cannot be accessed.
> 
> Here is a hex dump of the barebox image I'm using:
> 
> ...
> 0400: 0xd1 0x00 0x20 0x40 0x00 0x10 0x00 0x80 0x00 0x00 0x00 0x00 0x2c 0x04 0x00 0x80 
> 0410: 0x20 0x04 0x00 0x80 0x00 0x04 0x00 0x80 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 
> 0420: 0x00 0x00 0x00 0x80 0x00 0x00 0x07 0x00 0x00 0x00 0x00 0x00 0xd2 0x01 0xbc 0x40 
> 0430: 0xcc 0x01 0x6c 0x04 0x30 0x34 0x00 0x04 0x4f 0x40 0x00 0x05 0x30 0x39 0x10 0x00 
> 0440: 0x00 0x00 0x00 0x02 0x30 0x7a 0x00 0x00 0x01 0x04 0x00 0x01 0x30 0x7a 0x01 0xa0 

This is quite unreadable. Could you post the output of 'md -s /dev/m25p0 1k+1k' ?

Sascha

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