On Tue, Nov 08, 2016 at 09:51:36PM +0100, Jose Luis Zabalza wrote: > > So you have 512MiB on each chip select, so I assume that on the 512MiB > > board variants CS1 is not equipped. > > Yes, it is. > > >In that case you can in lowlevel.c > > test if you find SDRAM on CS1 and if not, disable the chip select > > completely in the SDRAM controller. > > OK. But how ? I enable CS0 and CS1 on DCD table. Is there any way to > tell barebox not to use CS1 ? > > > I am not sure how you can detect if there's SDRAM on CS1. I've seen > > situations in which the board just hangs if you access non existent RAM > > areas. > > I have tried it, but I have not be able to implement a code for > autodetect. If the code write or read a value on a position without > physical chip, the microcontroller hangs. ???? > > But it's not a problem. A solution is configure both CS and MMU. If > bootloader don't access to high positions, there is not problem. After > I set a environment variable with memory size and the mem kernel > parameter (or ATAG) does the rest. You said that both board variants work with the same U-Boot binary, how does it work there? Is there some detection mechanism or is it only some environment variable that you have to set manually? Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
