On Tue, Nov 08, 2016 at 06:09:52AM +0100, Jose Luis Zabalza wrote: > Thanks Sascha > > RAM memory reference is MT41K128M16JT-125 XIT > https://www.micron.com/parts/dram/ddr3-sdram/mt41k128m16jt-125-xit > > ================<cut>========================= > barebox 2016.09.0-00071-ga38b701-dirty #11 Tue Nov 8 05:56:31 CET 2016 > > > Board: MyBoard i.MX53 > detected i.MX53 revision 2.1 > CS0: 0x20000000 > CS1: 0x20000000 > ... > > ================<cut>========================= So you have 512MiB on each chip select, so I assume that on the 512MiB board variants CS1 is not equipped. In that case you can in lowlevel.c test if you find SDRAM on CS1 and if not, disable the chip select completely in the SDRAM controller. I am not sure how you can detect if there's SDRAM on CS1. I've seen situations in which the board just hangs if you access non existent RAM areas. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
