> So you have 512MiB on each chip select, so I assume that on the 512MiB > board variants CS1 is not equipped. Yes, it is. >In that case you can in lowlevel.c > test if you find SDRAM on CS1 and if not, disable the chip select > completely in the SDRAM controller. OK. But how ? I enable CS0 and CS1 on DCD table. Is there any way to tell barebox not to use CS1 ? > I am not sure how you can detect if there's SDRAM on CS1. I've seen > situations in which the board just hangs if you access non existent RAM > areas. I have tried it, but I have not be able to implement a code for autodetect. If the code write or read a value on a position without physical chip, the microcontroller hangs. ???? But it's not a problem. A solution is configure both CS and MMU. If bootloader don't access to high positions, there is not problem. After I set a environment variable with memory size and the mem kernel parameter (or ATAG) does the rest. So, I have to make sure Barebox don't reach CS1 memory positions. That is all. Thanks for your help. See you later. -- jlz.3008 a t gmail.com Linux Counter 172551 https://linuxcounter.net/cert/172551.png _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
