Hi all,
glad you found my patch useful. Sascha rejected it because he sees it
more fit to separate the initialization of sama5d3 and sam9 since they
are quite different.
I started, as advised by Sascha, to create into sam9_smc.c the function
void sama5d3_smc_configure(int id, int cs, struct sama5d3_smc_config
*config)
but this brings on some other changes to keep the same structure of
functions, i.e. we would need to implement
static void sama5d3_smc_cs_configure(void __iomem *base, struct
sama5d3_smc_config *config)
and all the related functions, since the argument changes from struct
sam9_smc_config * to struct sama5d3_smc_config *
Now I'm asking you all for a comment: should we go ahead and create a
new sama5d3_smc.c file with all the functions (some will unfortunately
be a duplicate of those present in sam9_smc.c), or should I do a partial
hack to insert sama5d3 specific functions into sam9_smc.c (like, for
example, playing with config structures so that the sam9 one is just the
head of the sama5d3)?
Thank you in advance for your comments, I ask Raphaël to wait until this
patch is settled to send in his changes. They will be very useful for
me, too (I had to deactivate PMECC to use my NAND...)
M
Il 13/06/2014 10:48, Raphaël Poggi ha scritto:
Hi,
I'm testing with a custom board. I have just with the applied test and
it's working ! I can use 8k page nand with atmel_nand driver.
Do I have to wait until Matteo's patches are applied or can I submit
mine right now ?
Best regards,
Raphaël Poggi
2014-06-13 3:26 GMT+02:00 Bo Shen <voice.shen@xxxxxxxxx>:
Hi Raphaël,
On 06/12/2014 08:28 PM, Raphaël Poggi wrote:
Hi,
I'm working on a series of patches, to support 8k nand page in
atmel_nand driver.
Currently, I can detect the nand and handle an oob size of 448. But i
have a problem with the pmecc, when barebox tried to perform pmecc
operation, I get the following message:
PMECC: Timeout to calculate error location.
Example of log:
nand: NAND device: Manufacturer ID: 0x2c, Chip ID: 0x68 (Micron
MT29F32G08ABAAAWP), 4096MiB, page size: 8192, OOB size: 448
atmel_nand atmel_nand0: Initialize PMECC params, cap: 8, sector: 1024
atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
Bad block table not found for chip 0
atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
atmel_nand atmel_nand0: PMECC: Timeout to calculate error location.
Bad block table not found for chip 0
Scanning device for bad blocks
Bad eraseblock 90 at 0x000005a00000
Bad eraseblock 91 at 0x000005b00000
atmel_nand atmel_nand0: PMECC: Timeout to get ECC value.
nand_bbt: error while writing bad block table -110
I don't know/find why barebox get a timeout...
Someone have an idea ?
Which board are you test this?
Can you try to apply two patches from matteo.fortini@xxxxxxxxx on 2014-06-06
with name
[PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS
[PATCH 2/2] sama5d3x: HSMC NAND initialize TIMINGS and import values
Best regards,
Raphaël
Best Regards,
Bo Shen
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