Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> writes:
> These partitions are not on eraseblock boundaries, so I assume you use
> some script to combine barebox and firmware into a single image. Can we
> integrate this into the make system or at least add some instructions
> how to generate this image?
I patch them in flash with JTAG/OpenOCD, guess that's not what most
people will do. Added some instructions, it should be pretty clear now
(the NPE microcode files aren't going to change, Intel seems to have
finalized the IXP42x support at version 2.4).
>> +#ifdef CONFIG_USE_IRQ
>> +
>> +static void (*irq_handlers[HALF_QUEUES])(void *pdev);
>> +static void *irq_pdevs[HALF_QUEUES];
>> +
>> +#undef fls
>> +static inline int fls(int x)
>> +{
>> + int ret;
>> + asm("clz\t%0, %1" : "=r" (ret) : "r" (x) : "cc");
>> + ret = 32 - ret;
>> + return ret;
>> +}
>
> fls is defined in a similar way in arch/arm/include/asm/bitops.h:
>
> #define fls(x) \
> (__builtin_constant_p(x) ? constant_fls(x) : \
> ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }))
>
> Or am I missing something?
Looks like u-boot (v.1) doesn't have it, I was thinking of using u-boot
instead at first. Removed (I don't use CONFIG_USE_IRQ anyway).
WRT endianness switching, I added a couple of #ifdefs. It seems
gcc-4.4.x with EABI can optimize the unused "swap" parameter out, even
without actually inlining the function.
--
Krzysztof Halasa
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