On Tue, Nov 17, 2020 at 12:45 PM Valdis Klētnieks <valdis.kletnieks@xxxxxx> wrote: > > > > If you swap them, you get... > > > > > > dc ivac,x1 // invalidate a cache line that's probably OK > > > str w0,[x1 // and now we do a store that leaves a possibly stale cache line > > > > > > In other words, if you swap them you may leave an un-invalidated > > > stale cache line. > > > > You mean, even if STCLR_EL1.{C, M} is cleared, store doesn't bypass the > > cache? > > That's the problem. The store bypasses the cache line, and the next reference > that uses the cache can get stale data. So you have to flush the cache line > so the next reference has to refresh the cache on the memory read. Yes, I understood that I have to flush the cache before the cacheable read(mmu on). But I'm not fully understand your explanation below. > > > dc ivac,x1 // invalidate a cache line that's probably OK > > > str w0,[x1 // and now we do a store that leaves a possibly stale cache line Could you explain me why the store still leaves stale cache? We invalidated the cacheline and store will not make footprint in the cache. _______________________________________________ Kernelnewbies mailing list Kernelnewbies@xxxxxxxxxxxxxxxxx https://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies