arm64: Question about barriers with the mmu off

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On Tue, Nov 17, 2020 at 11:14 AM Valdis Klētnieks <valdis.kletnieks@xxxxxx> wrote:

> If you swap them, you get...
>
> dc ivac,x1   // invalidate a cache line that's probably OK
> str w0,[x1   // and now we do a store that leaves a possibly stale cache line
>
> In other words, if you swap them you may leave an un-invalidated
> stale cache line.

You mean, even if STCLR_EL1.{C, M} is cleared, store doesn't bypass the cache?

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