Re: [PATCH resend] MIPS: Allow FPU emulator to use non-stack area.

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On 10/07/2014 12:28 PM, Andy Lutomirski wrote:
On Tue, Oct 7, 2014 at 12:21 PM, Rich Felker <dalias@xxxxxxxx> wrote:
On Tue, Oct 07, 2014 at 12:16:59PM -0700, Leonid Yegoshin wrote:
On 10/07/2014 12:09 PM, Rich Felker wrote:
I agree completely here. We should not break things (or, as it
seems, leave them broken) for common usage cases that affect
everyone just to coddle proprietary vendor-specific instructions.
The latter just should not be used in delay slots unless the chip
vendor also promises to provide fpu branch in hardware. Rich
And what do you propose - remove a current in-stack emulation and
you still think it doesn't break a status-quo?

The in-stack trampoline support could be left but used only for
emulating instructions the kernel doesn't know. This would make all
normal binaries immediately usable with non-executable stack, and
would avoid the only potential source of regressions. Ultimately I
think the "xol" stuff should be removed, but that could be a long term
goal.

Does anything break if the xol stuff is disabled for PT_GNU_STACK tasks?


The instructions must be executed, if you turn on a non-executable stack, you cannot execute them on the stack, so they must be handled in another way, which is the subject of this thread.

Options:

1a) XOL kernel manages the memory
1b) XOL userspace manages the menory
2) Emulate the instructions.
3) I don't think there is a 3rd. option.

As the imgtec people have said, you have to do #2 for their new r6 ISA, as it uses PC relative instructions.

I really think we should bite the bullet and do #2 for everything, it will be the cleanest long term solutions.

David Daney





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