> >> the out-of-line execution trick, but do it somewhere other than in > >> stack memory. > > How do you answer Andy Lutomirski's question about what happens when a > > signal handler interrupts execution while the program counter is > > pointing at this "out-of-line execution" trampoline? This seems like a > > show-stopper for using anything other than the stack. > It would be nice to support, but not doing so would not be a regression > from current behavior. It seems appropriate to mention another issue which should be addressed as part of the overall FPU emulation work... >From what I can see the out-of-line execution of delay slot instructions will break micromips R3 addiupc, and all MIPS32r6 and MIPS64r6 PC-relative instructions (inc load/store) as they will have the wrong base. Is there anything in the current set of proposals that can address this (beyond adding restrictions to what is ABI allowed in FPU branch delay slots)? This is an issue whether the stack is executable or not but does directly relate to the topic of FPU emulation. It sounds like the kernel would not be able to emulate a pc-relative load/store even if it was a special case as it would not run in the correct MM context? [be gentle, I'm no expert in this area]. Matthew
