On Tue, Oct 07, 2014 at 11:44:35AM -0700, Andy Lutomirski wrote: > > 4) The voice for doing any instruction emulation in kernel - it is not a > > MIPS business model to force customer to put details of all Coprocessor 2 > > instructions public. We provide an interface and the rest is a customer > > business. Besides that it is really painful to make a differentiation > > between Cavium Octeon and some another CPU instructions with the same > > opcode. On other side, leaving emulation of their instructions to them is > > not a wise after having some good way doing that multiple years. > > IMO this is all backwards. If MIPS customers put proprietary > instructions into their ISA, they leave out the FPU, and they put a > proprietary insn in a branch delay slot, then I think that they > deserve a fatal signal. I agree completely here. We should not break things (or, as it seems, leave them broken) for common usage cases that affect everyone just to coddle proprietary vendor-specific instructions. The latter just should not be used in delay slots unless the chip vendor also promises to provide fpu branch in hardware. Rich
