Hi, David and Ralf This patch have broken the support to the MIPS variants whose cpu_has_mips_r2 is 0 for the CAC_BASE and CKSEG0 is completely different in these MIPSs. With the patch, the kernel will exit when booting(later after trap_init()). A potential patch to fix the above problem is: diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 1a4dd65..d8cb554 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1599,7 +1599,7 @@ void __init trap_init(void) ebase = (unsigned long) __alloc_bootmem(size, 1 << fls(size), 0); } else { - ebase = CKSEG0; + ebase = (cpu_has_mips_r2) ? CKSEG0 : CAC_BASE; if (cpu_has_mips_r2) ebase += (read_c0_ebase() & 0x3ffff000); } Regards, Wu Zhangjin On Tue, 2010-04-06 at 13:29 -0700, David Daney wrote: > The ebase is relative to CKSEG0 not CAC_BASE. On a 32-bit kernel they > are the same thing, for a 64-bit kernel they are not. > > It happens to kind of work on a 64-bit kernel as they both reference > the same physical memory. However since the CPU uses the CKSEG0 base, > determining if a J instruction will reach always gives the wrong > result unless we use the same number the CPU uses. > > Signed-off-by: David Daney <ddaney@xxxxxxxxxxxxxxxxxx> > --- > arch/mips/kernel/traps.c | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c > index 7ce84bb..b122f76 100644 > --- a/arch/mips/kernel/traps.c > +++ b/arch/mips/kernel/traps.c > @@ -1706,7 +1706,7 @@ void __init trap_init(void) > ebase = (unsigned long) > __alloc_bootmem(size, 1 << fls(size), 0); > } else { > - ebase = CAC_BASE; > + ebase = CKSEG0; > if (cpu_has_mips_r2) > ebase += (read_c0_ebase() & 0x3ffff000); > }