Hi, > > It does not help too much with a 32-bit virtual address space indeed. > > Though I gather it has to be very sparsely populated as 16MiB is enough to > > cover the whole configuration space of a single PCI bus tree. Thus it has > > Hm, maybe 16 MiB would be enough indeed, as the Alchemy CPUs are known to > not support bus masters behind PCI bridges... That is unrelated -- for configuration accesses (assuming the basic configuration space) you need: 8 bits for the bus number + 5 bits for the device number + 3 bits for the function number + 8 bits for the register number. The total is 24 bits. It is up to hardware to sort it out and put the right bits on the bus. Maciej
