Maciej W. Rozycki wrote:
Of course it will. It shall work with whatever physical address space is supported by your MMU. As long as the MMU is handled correctly that is, but I guess I may have omitted this clarification as obvious.
Even on a CPU with 36-bit physical address? ;-)
WTF... I know I've typed "32-bit CPU"! :-/
It does not matter. The physical address of an I/O resource can be
Believe me, it does in *this* case. :-)
treated as a cookie that is converted, typically though an MMU, to another cookie that can be used with {read,write}{b,w,l}(). Of course you may have troubles ioremap()ping say 4GB of I/O space on a processor with a 32-bit virtual address space, but that is a corner case and typically your I/O space will be sparsely occupied.
It is exactly this case.
On a MIPS32 processor you have 512MB of KSEG0/1 unmapped virtual address space available for I/O devices located within the first 512MB of the
PCI config. space is mapped at 0x600000000, well beyond KGSEG0/1.
physical address space plus 1GB of KSEG2 mapped virtual address space available for I/O devices located anywhere in the physical address space. That gives you from 1GB to 1.5GB of virtual address space for I/O which is enough for all the usual cases.
This case is not usual. :-)
Maciej
Thanks for wasting time on my education about MIPS. ;-) WBR, Sergei
