On Wed, 1 Aug 2007, Sergei Shtylyov wrote: > PCI config. space is mapped at 0x600000000, well beyond KGSEG0/1. It is still just fine with ioremap() -- it will simply use KSEG2 in this case. You cannot bypass the TLB here with a 32-bit processor no matter what. And regarding what you have written above and the size issue you mentioned in another e-mail (do you map the whole PCI config space linearly in the physical address space of the CPU or suchlike?) -- PCI config space accesses are rare (by design rather than chance), so performance is a non-issue and it should be absolutely fine for you to call ioremap() and iounmap() in code specific for your PCI host bridge for the required fragment upon every access. There is no need for a permanent map here. You probably waste more performance by taking away a TLB entry to wire it anyway. > Thanks for wasting time on my education about MIPS. ;-) Well, more about Linux perhaps than MIPS in general. :-) Maciej
