* Felipe Balbi | 2012-02-06 15:40:41 [+0200]: >I'm not sure we will have such problems, I can update the commit log, >but if someone wants to use this in BE, they cannot be penalized with a >le32_to_cpu() everytime they want to do anything with the TRBs, because >they can just set bit 12 of GSBUSCFG0 and the HW will start working in >BE mode. The hardware is not working in BE mode, it will just swap the reads of the descriptors. The register access is still LE unless they change something SoC specific like the bus access to which DWC3 is wired. >At some point we could just add a couple of DT attributes for platforms >to pass the desired SoC Bus mode down to driver via DT. We have the "normal" mode where we have LE register access and may read the descriptors in BE mode. Lets say this the default mode. Then we may need to set this in HW because the default-poweron mode is wrong. Then we may need additional parameter in case the register access is not LE but BE due to some magic. >What do you want me to add on commit log ? It would be nice if you could denote this change in the commit log: "There are no more little endian mode for the access of the TRB. There are in CPU byte order now. On Powerpc bit12 of GSBUSCFG0 should be set and do the right thing. If it is not, we can set this bit." The spec does not mention if the event buffer is part of the "descriptor" so I guess it is okay for now and once with real HW comes along we will know for sure. Sebastian -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
