> -----Original Message-----
> From: Francesco Dolcini <francesco@xxxxxxxxxx>
> Sent: Wednesday, November 2, 2022 3:51 AM
> To: Jun Li <jun.li@xxxxxxx>
> Cc: Francesco Dolcini <francesco@xxxxxxxxxx>; Jun Li (OSS)
> <jun.li@xxxxxxxxxxx>; Peter Chen <peter.chen@xxxxxxxxxx>;
> linux-usb@xxxxxxxxxxxxxxx; Greg Kroah-Hartman
> <gregkh@xxxxxxxxxxxxxxxxxxx>; Shawn Guo <shawnguo@xxxxxxxxxx>; Sascha
> Hauer <s.hauer@xxxxxxxxxxxxxx>; Pengutronix Kernel Team
> <kernel@xxxxxxxxxxxxxx>; Fabio Estevam <festevam@xxxxxxxxx>; dl-linux-imx
> <linux-imx@xxxxxxx>; Felipe Balbi <balbi@xxxxxxxxxx>;
> philippe.schenker@xxxxxxxxxxx; Francesco Dolcini
> <francesco.dolcini@xxxxxxxxxxx>
> Subject: Re: USB runtime PM issues on i.MX6ULL
>
> Hello Jun Li,
>
> On Tue, Nov 01, 2022 at 03:10:46AM +0000, Jun Li wrote:
> > > On Mon, Oct 31, 2022 at 01:40:39PM +0000, Jun Li (OSS) wrote:
> > > > > I am debugging some unexpected USB behavior on a i.MX6ULL SOC,
> > > > > chipidea controller ("fsl,imx6ul-usb") and a fsl mxs usbphy
> > > > > ("fsl,imx6ul-usbphy").
> > > > >
> > > > > The HW design has 2 USB interface, the first one is dual-role,
> > > > > while the second one is a host port with NO way to re-read the
> > > > > VBUS (USB_OTG2_VBUS is not really connected, there is just a
> > > > > capacitor to GND).
> > > >
> > > > How is your USB_OTG1_VBUS status? Can you try to make your
> > > > USB_OTG1_VBUS pad has a valid VBUS voltage, then run your Host
> > > > only port test with runtime PM enabled?
> > >
> > > USB_OTG1_VBUS is tied to GND the same way as USB_OTG2_VBUS, not
> > > really straightforward to do such a test.
> >
> > iMX6ULL need at least one valid VBUS(either from OTG1 or OTG2) as
> > input to power the internal USB LDO if I understand correctly.
> This surprise me a little bit, since
> - the i.MX6ULL datasheet prescribe to keep the VBUS disconnected if
> unused
I think "unused" here means you do not need/enable the port at all.
> - downstream NXP kernel seems to work fine ("seems" since we do have
> some patches there, so I could be wrong)
What do you mean by " downstream NXP kernel seems to work fine"?
The downstream kernel can work on your HW? But upstream kernel
driver does not?
> - disabling runtime pm on upstream Linux kernel make it works
> perfectly, so there is a way in SW to have this HW configuration
> working.
Again I want to make sure the both VBUS pads(OTG1 and OTG2) voltage
are always at 0v on your HW, can you double check and confirm?
I ask this again because such situation should cause the USB port
Cannot work at any cases, but your current status is: only low
power wakeup cannot work.
>
> > your HW to meet this: for Host only port, you have to connect
> > USB_OTG2_VBUS to a valid VBUS and make it always present for simple.
> > You can do some quick HW change to prove this.
> We have no way to change the HW in reality, therefore doing a one off test
> would be pretty much irrelevant.
My intention of doing this HW rework is just for debug.
>
> Said all of that, given what you wrote, I feel like having a specific dts
> property in the chipidea driver to disable runtime pm might be the way to
> go.
>
> Something like `ci,disable-runtime-pm`? I know the DTS is supposed to
> describe the HW, so maybe a different property name would be required.
>
> What do you think about this?
This is the last step to consider, we cannot go this way before root cause
identified.
Thanks
Li Jun
>
> Francesco
