Re: USB runtime PM issues on i.MX6ULL

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Hello Li Jun,

On Mon, Oct 31, 2022 at 01:40:39PM +0000, Jun Li (OSS) wrote:
> > -----Original Message-----
> > From: Francesco Dolcini <francesco@xxxxxxxxxx>
> > Sent: Friday, October 28, 2022 8:32 PM
> > To: Peter Chen <peter.chen@xxxxxxxxxx>; linux-usb@xxxxxxxxxxxxxxx; Jun Li
> > <jun.li@xxxxxxx>
> > Cc: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>; Shawn Guo
> > <shawnguo@xxxxxxxxxx>; Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>; Pengutronix
> > Kernel Team <kernel@xxxxxxxxxxxxxx>; Fabio Estevam <festevam@xxxxxxxxx>;
> > dl-linux-imx <linux-imx@xxxxxxx>; Felipe Balbi <balbi@xxxxxxxxxx>;
> > philippe.schenker@xxxxxxxxxxx; Francesco Dolcini
> > <francesco.dolcini@xxxxxxxxxxx>
> > Subject: USB runtime PM issues on i.MX6ULL
> > 
> > Hello all,
> > 
> > I am debugging some unexpected USB behavior on a i.MX6ULL SOC,
> > chipidea controller ("fsl,imx6ul-usb") and a fsl mxs usbphy
> > ("fsl,imx6ul-usbphy").
> > 
> > The HW design has 2 USB interface, the first one is dual-role, while the
> > second
> > one is a host port with NO way to re-read the VBUS (USB_OTG2_VBUS is not
> > really connected, there is just a capacitor to GND).
> 
> How is your USB_OTG1_VBUS status? Can you try to make your USB_OTG1_VBUS pad
> has a valid VBUS voltage, then run your Host only port test with runtime PM
> enabled?

USB_OTG1_VBUS is tied to GND the same way as USB_OTG2_VBUS, not really
straightforward to do such a test.

Francesco




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